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Commit ede2e019 authored Apr 03, 2017 by Christopher James Halse Rogers Committed by Alex Deucher Apr 07, 2017

drm/radeon: Refuse to migrate a prime BO to VRAM. (v2)

BOs shared via dma-buf, either imported or exported, cannot sensibly be migrated to VRAM
without breaking the dma-buf sharing. Refuse userspace requests to migrate to VRAM,
ensure such BOs are not migrated during command submission, and refuse to pin them
to VRAM.

v2: Don't pin BOs in GTT. Instead, refuse to migrate BOs to VRAM.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Christopher James Halse Rogers <christopher.halse.rogers@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

parent 0d16d299

drivers/gpu/drm/radeon/radeon_cs.c

+10 −0

Original line number	Original line	Diff line number	Diff line
	@@ -164,6 +164,16 @@ static int radeon_cs_parser_relocs(struct radeon_cs_parser *p)
	p->relocs[i].allowed_domains = domain;		p->relocs[i].allowed_domains = domain;
	}		}

			/* Objects shared as dma-bufs cannot be moved to VRAM */
			if (p->relocs[i].robj->prime_shared_count) {
			p->relocs[i].allowed_domains &= ~RADEON_GEM_DOMAIN_VRAM;
			if (!p->relocs[i].allowed_domains) {
			DRM_ERROR("BO associated with dma-buf cannot "
			"be moved to VRAM\n");
			return -EINVAL;
			}
			}

	p->relocs[i].tv.bo = &p->relocs[i].robj->tbo;		p->relocs[i].tv.bo = &p->relocs[i].robj->tbo;
	p->relocs[i].tv.shared = !r->write_domain;		p->relocs[i].tv.shared = !r->write_domain;

drivers/gpu/drm/radeon/radeon_gem.c

+4 −0

Original line number	Original line	Diff line number	Diff line
	@@ -120,6 +120,10 @@ static int radeon_gem_set_domain(struct drm_gem_object *gobj,
	return r;		return r;
	}		}
	}		}
			if (domain == RADEON_GEM_DOMAIN_VRAM && robj->prime_shared_count) {
			/* A BO that is associated with a dma-buf cannot be sensibly migrated to VRAM */
			return -EINVAL;
			}
	return 0;		return 0;
	}		}

drivers/gpu/drm/radeon/radeon_object.c

+5 −0

Original line number	Original line	Diff line number	Diff line
	@@ -352,6 +352,11 @@ int radeon_bo_pin_restricted(struct radeon_bo *bo, u32 domain, u64 max_offset,

	return 0;		return 0;
	}		}
			if (bo->prime_shared_count && domain == RADEON_GEM_DOMAIN_VRAM) {
			/* A BO shared as a dma-buf cannot be sensibly migrated to VRAM */
			return -EINVAL;
			}

	radeon_ttm_placement_from_domain(bo, domain);		radeon_ttm_placement_from_domain(bo, domain);
	for (i = 0; i < bo->placement.num_placement; i++) {		for (i = 0; i < bo->placement.num_placement; i++) {
	/* force to pin into visible video ram */		/* force to pin into visible video ram */