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Commit edd14218 authored by Maxime Ripard's avatar Maxime Ripard Committed by Vinod Koul
Browse files

dt-bindings: dmaengine: Convert Allwinner A31 and A64 DMA to a schema 



The newer Allwinner SoCs have a DMA controller supported in Linux, with a
matching Device Tree binding.

Now that we have the DT validation in place, let's convert the device tree
bindings for that controller over to a YAML schemas.

Reviewed-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarMaxime Ripard <maxime.ripard@bootlin.com>
Link: https://lore.kernel.org/r/20190720092607.31095-3-maxime.ripard@bootlin.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 545a29c8

Documentation/devicetree/bindings/dma/allwinner,sun50i-a64-dma.yaml

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# SPDX-License-Identifier: GPL-2.0

%YAML 1.2

---

$id: http://devicetree.org/schemas/dma/allwinner,sun50i-a64-dma.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Allwinner A64 DMA Controller Device Tree Bindings



maintainers:

  - Chen-Yu Tsai <wens@csie.org>

  - Maxime Ripard <maxime.ripard@bootlin.com>



allOf:

  - $ref: "dma-controller.yaml#"



properties:

  "#dma-cells":

    const: 1

    description: The cell is the request line number.



  compatible:

    enum:

      - allwinner,sun50i-a64-dma

      - allwinner,sun50i-h6-dma



  reg:

    maxItems: 1



  interrupts:

    maxItems: 1



  clocks:

    minItems: 1

    maxItems: 2



  clock-names:

    items:

      - const: bus

      - const: mbus



  resets:

    maxItems: 1



required:

  - "#dma-cells"

  - compatible

  - reg

  - interrupts

  - clocks

  - resets

  - dma-channels



if:

  properties:

    compatible:

      const: allwinner,sun50i-h6-dma



then:

  properties:

    clocks:

      maxItems: 2



  required:

    - clock-names



else:

  properties:

    clocks:

      maxItems: 1



# FIXME: We should set it, but it would report all the generic

# properties as additional properties.

# additionalProperties: false



examples:

  - |

    dma: dma-controller@1c02000 {

        compatible = "allwinner,sun50i-a64-dma";

        reg = <0x01c02000 0x1000>;

        interrupts = <0 50 4>;

        clocks = <&ccu 30>;

        dma-channels = <8>;

        dma-requests = <27>;

        resets = <&ccu 7>;

        #dma-cells = <1>;

    };



...

Documentation/devicetree/bindings/dma/allwinner,sun6i-a31-dma.yaml

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# SPDX-License-Identifier: GPL-2.0

%YAML 1.2

---

$id: http://devicetree.org/schemas/dma/allwinner,sun6i-a31-dma.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Allwinner A31 DMA Controller Device Tree Bindings



maintainers:

  - Chen-Yu Tsai <wens@csie.org>

  - Maxime Ripard <maxime.ripard@bootlin.com>



allOf:

  - $ref: "dma-controller.yaml#"



properties:

  "#dma-cells":

    const: 1

    description: The cell is the request line number.



  compatible:

    oneOf:

      - const: allwinner,sun6i-a31-dma

      - const: allwinner,sun8i-a23-dma

      - const: allwinner,sun8i-a83t-dma

      - const: allwinner,sun8i-h3-dma

      - const: allwinner,sun8i-v3s-dma



  reg:

    maxItems: 1



  interrupts:

    maxItems: 1



  clocks:

    maxItems: 1



  resets:

    maxItems: 1



required:

  - "#dma-cells"

  - compatible

  - reg

  - interrupts

  - clocks

  - resets



additionalProperties: false



examples:

  - |

    dma: dma-controller@1c02000 {

        compatible = "allwinner,sun6i-a31-dma";

        reg = <0x01c02000 0x1000>;

        interrupts = <0 50 4>;

        clocks = <&ahb1_gates 6>;

        resets = <&ahb1_rst 6>;

        #dma-cells = <1>;

    };



...

Documentation/devicetree/bindings/dma/sun6i-dma.txt

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Allwinner A31 DMA Controller



This driver follows the generic DMA bindings defined in dma.txt.



Required properties:



- compatible:	Must be one of

		  "allwinner,sun6i-a31-dma"

		  "allwinner,sun8i-a23-dma"

		  "allwinner,sun8i-a83t-dma"

		  "allwinner,sun8i-h3-dma"

		  "allwinner,sun8i-v3s-dma"

- reg:		Should contain the registers base address and length

- interrupts:	Should contain a reference to the interrupt used by this device

- clocks:	Should contain a reference to the parent AHB clock

- resets:	Should contain a reference to the reset controller asserting

		this device in reset

- #dma-cells :	Should be 1, a single cell holding a line request number



Example:

	dma: dma-controller@1c02000 {

		compatible = "allwinner,sun6i-a31-dma";

		reg = <0x01c02000 0x1000>;

		interrupts = <0 50 4>;

		clocks = <&ahb1_gates 6>;

		resets = <&ahb1_rst 6>;

		#dma-cells = <1>;

	};



------------------------------------------------------------------------------

For A64 and H6 DMA controller:



Required properties:

- compatible:	Must be one of

		  "allwinner,sun50i-a64-dma"

		  "allwinner,sun50i-h6-dma"

- dma-channels: Number of DMA channels supported by the controller.

		Refer to Documentation/devicetree/bindings/dma/dma.txt

- clocks:	In addition to parent AHB clock, it should also contain mbus

		clock (H6 only)

- clock-names:	Should contain "bus" and "mbus" (H6 only)

- all properties above, i.e. reg, interrupts, clocks, resets and #dma-cells



Optional properties:

- dma-requests: Number of DMA request signals supported by the controller.

		Refer to Documentation/devicetree/bindings/dma/dma.txt



Example:

	dma: dma-controller@1c02000 {

		compatible = "allwinner,sun50i-a64-dma";

		reg = <0x01c02000 0x1000>;

		interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&ccu CLK_BUS_DMA>;

		dma-channels = <8>;

		dma-requests = <27>;

		resets = <&ccu RST_BUS_DMA>;

		#dma-cells = <1>;

	};

------------------------------------------------------------------------------



Clients:



DMA clients connected to the A31 DMA controller must use the format

described in the dma.txt file, using a two-cell specifier for each

channel: a phandle plus one integer cells.

The two cells in order are:



1. A phandle pointing to the DMA controller.

2. The port ID as specified in the datasheet



Example:

spi2: spi@1c6a000 {

	compatible = "allwinner,sun6i-a31-spi";

	reg = <0x01c6a000 0x1000>;

	interrupts = <0 67 4>;

	clocks = <&ahb1_gates 22>, <&spi2_clk>;

	clock-names = "ahb", "mod";

	dmas = <&dma 25>, <&dma 25>;

	dma-names = "rx", "tx";

	resets = <&ahb1_rst 22>;

};