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Commit edc89260 authored by James Hogan's avatar James Hogan
Browse files

KVM: MIPS/VZ: Support guest CP0_BadInstr[P] 



Add support for VZ guest CP0_BadInstr and CP0_BadInstrP registers, as
found on most VZ capable cores. These guest registers need context
switching, and exposing via the KVM ioctl API when they are present.

Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: "Radim Krčmář" <rkrcmar@redhat.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: linux-mips@linux-mips.org
Cc: kvm@vger.kernel.org
Cc: linux-doc@vger.kernel.org
parent 56f7a440

Documentation/virtual/kvm/api.txt

+2 −0
Original line number Diff line number Diff line
@@ -2079,6 +2079,8 @@ registers, find a list below: 
  MIPS  | KVM_REG_MIPS_CP0_WIRED        | 32

  MIPS  | KVM_REG_MIPS_CP0_HWRENA       | 32

  MIPS  | KVM_REG_MIPS_CP0_BADVADDR     | 64

  MIPS  | KVM_REG_MIPS_CP0_BADINSTR     | 32

  MIPS  | KVM_REG_MIPS_CP0_BADINSTRP    | 32

  MIPS  | KVM_REG_MIPS_CP0_COUNT        | 32

  MIPS  | KVM_REG_MIPS_CP0_ENTRYHI      | 64

  MIPS  | KVM_REG_MIPS_CP0_COMPARE      | 32

arch/mips/include/asm/kvm_host.h

+4 −0
Original line number Diff line number Diff line
@@ -40,6 +40,8 @@ 
#define KVM_REG_MIPS_CP0_WIRED		MIPS_CP0_32(6, 0)

#define KVM_REG_MIPS_CP0_HWRENA		MIPS_CP0_32(7, 0)

#define KVM_REG_MIPS_CP0_BADVADDR	MIPS_CP0_64(8, 0)

#define KVM_REG_MIPS_CP0_BADINSTR	MIPS_CP0_32(8, 1)

#define KVM_REG_MIPS_CP0_BADINSTRP	MIPS_CP0_32(8, 2)

#define KVM_REG_MIPS_CP0_COUNT		MIPS_CP0_32(9, 0)

#define KVM_REG_MIPS_CP0_ENTRYHI	MIPS_CP0_64(10, 0)

#define KVM_REG_MIPS_CP0_COMPARE	MIPS_CP0_32(11, 0)
@@ -669,6 +671,8 @@ __BUILD_KVM_RW_HW(pagegrain, 32, MIPS_CP0_TLB_PG_MASK, 1) 
__BUILD_KVM_RW_HW(wired,          32, MIPS_CP0_TLB_WIRED,    0)

__BUILD_KVM_RW_HW(hwrena,         32, MIPS_CP0_HWRENA,       0)

__BUILD_KVM_RW_HW(badvaddr,       l,  MIPS_CP0_BAD_VADDR,    0)

__BUILD_KVM_RW_HW(badinstr,       32, MIPS_CP0_BAD_VADDR,    1)

__BUILD_KVM_RW_HW(badinstrp,      32, MIPS_CP0_BAD_VADDR,    2)

__BUILD_KVM_RW_SW(count,          32, MIPS_CP0_COUNT,        0)

__BUILD_KVM_RW_HW(entryhi,        l,  MIPS_CP0_TLB_HI,       0)

__BUILD_KVM_RW_HW(compare,        32, MIPS_CP0_COMPARE,      0)

arch/mips/kvm/vz.c

+46 −0
Original line number Diff line number Diff line
@@ -1221,6 +1221,10 @@ static unsigned long kvm_vz_num_regs(struct kvm_vcpu *vcpu) 
	ret = ARRAY_SIZE(kvm_vz_get_one_regs);

	if (cpu_guest_has_userlocal)

		++ret;

	if (cpu_guest_has_badinstr)

		++ret;

	if (cpu_guest_has_badinstrp)

		++ret;

	ret += __arch_hweight8(cpu_data[0].guest.kscratch_mask);



	return ret;
@@ -1242,6 +1246,18 @@ static int kvm_vz_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *indices) 
			return -EFAULT;

		++indices;

	}

	if (cpu_guest_has_badinstr) {

		index = KVM_REG_MIPS_CP0_BADINSTR;

		if (copy_to_user(indices, &index, sizeof(index)))

			return -EFAULT;

		++indices;

	}

	if (cpu_guest_has_badinstrp) {

		index = KVM_REG_MIPS_CP0_BADINSTRP;

		if (copy_to_user(indices, &index, sizeof(index)))

			return -EFAULT;

		++indices;

	}

	for (i = 0; i < 6; ++i) {

		if (!cpu_guest_has_kscr(i + 2))

			continue;
@@ -1327,6 +1343,16 @@ static int kvm_vz_get_one_reg(struct kvm_vcpu *vcpu, 
	case KVM_REG_MIPS_CP0_BADVADDR:

		*v = (long)read_gc0_badvaddr();

		break;

	case KVM_REG_MIPS_CP0_BADINSTR:

		if (!cpu_guest_has_badinstr)

			return -EINVAL;

		*v = read_gc0_badinstr();

		break;

	case KVM_REG_MIPS_CP0_BADINSTRP:

		if (!cpu_guest_has_badinstrp)

			return -EINVAL;

		*v = read_gc0_badinstrp();

		break;

	case KVM_REG_MIPS_CP0_COUNT:

		*v = kvm_mips_read_count(vcpu);

		break;
@@ -1472,6 +1498,16 @@ static int kvm_vz_set_one_reg(struct kvm_vcpu *vcpu, 
	case KVM_REG_MIPS_CP0_BADVADDR:

		write_gc0_badvaddr(v);

		break;

	case KVM_REG_MIPS_CP0_BADINSTR:

		if (!cpu_guest_has_badinstr)

			return -EINVAL;

		write_gc0_badinstr(v);

		break;

	case KVM_REG_MIPS_CP0_BADINSTRP:

		if (!cpu_guest_has_badinstrp)

			return -EINVAL;

		write_gc0_badinstrp(v);

		break;

	case KVM_REG_MIPS_CP0_COUNT:

		kvm_mips_write_count(vcpu, v);

		break;
@@ -1871,6 +1907,11 @@ static int kvm_vz_vcpu_load(struct kvm_vcpu *vcpu, int cpu) 
			kvm_restore_gc0_kscratch6(cop0);

	}



	if (cpu_guest_has_badinstr)

		kvm_restore_gc0_badinstr(cop0);

	if (cpu_guest_has_badinstrp)

		kvm_restore_gc0_badinstrp(cop0);



	/* restore Root.GuestCtl2 from unused Guest guestctl2 register */

	if (cpu_has_guestctl2)

		write_c0_guestctl2(
@@ -1945,6 +1986,11 @@ static int kvm_vz_vcpu_put(struct kvm_vcpu *vcpu, int cpu) 
			kvm_save_gc0_kscratch6(cop0);

	}



	if (cpu_guest_has_badinstr)

		kvm_save_gc0_badinstr(cop0);

	if (cpu_guest_has_badinstrp)

		kvm_save_gc0_badinstrp(cop0);



	kvm_vz_save_timer(vcpu);



	/* save Root.GuestCtl2 in unused Guest guestctl2 register */