Loading bindings/mmc/sdhci-msm.txt +18 −0 Original line number Diff line number Diff line Loading @@ -39,6 +39,21 @@ Required properties: "cal" - reference clock for RCLK delay calibration (optional) "sleep" - sleep clock for RCLK delay calibration (optional) Optional properties: - devfreq,freq-table - specifies supported frequencies for clock scaling. Clock scaling logic shall toggle between these frequencies based on card load. In case the defined frequencies are over or below the supported card frequencies, they will be overridden during card init. In case this entry is not supplied, the driver will construct one based on the card supported max and min frequencies. The frequencies must be ordered from lowest to highest. - scaling-lower-bus-speed-mode - Few hosts can support DDR52 mode at the same lower system voltage corner as high-speed mode. In such cases, it is always better to put it in DDR mode which will improve the performance without any power impact. Example: sdhc_1: sdhci@f9824900 { Loading Loading @@ -73,4 +88,7 @@ Example: clocks = <&gcc GCC_SDCC2_APPS_CLK>, <&gcc GCC_SDCC2_AHB_CLK>; clock-names = "core", "iface"; qcom,devfreq,freq-table = <50000000 200000000>; qcom,scaling-lower-bus-speed-mode = "DDR52"; }; Loading
bindings/mmc/sdhci-msm.txt +18 −0 Original line number Diff line number Diff line Loading @@ -39,6 +39,21 @@ Required properties: "cal" - reference clock for RCLK delay calibration (optional) "sleep" - sleep clock for RCLK delay calibration (optional) Optional properties: - devfreq,freq-table - specifies supported frequencies for clock scaling. Clock scaling logic shall toggle between these frequencies based on card load. In case the defined frequencies are over or below the supported card frequencies, they will be overridden during card init. In case this entry is not supplied, the driver will construct one based on the card supported max and min frequencies. The frequencies must be ordered from lowest to highest. - scaling-lower-bus-speed-mode - Few hosts can support DDR52 mode at the same lower system voltage corner as high-speed mode. In such cases, it is always better to put it in DDR mode which will improve the performance without any power impact. Example: sdhc_1: sdhci@f9824900 { Loading Loading @@ -73,4 +88,7 @@ Example: clocks = <&gcc GCC_SDCC2_APPS_CLK>, <&gcc GCC_SDCC2_AHB_CLK>; clock-names = "core", "iface"; qcom,devfreq,freq-table = <50000000 200000000>; qcom,scaling-lower-bus-speed-mode = "DDR52"; };