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Commit ed50edfb authored by Jason Gunthorpe's avatar Jason Gunthorpe
Browse files

Merge branch 'mlx5-next' into rdma.git 

From git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux

mlx5 updates taken for dependencies on following patches.

* branche 'mlx5-next': (23 commits)
  IB/mlx5: Introduce uid as part of alloc/dealloc transport domain
  net/mlx5: Add shared Q counter bits
  net/mlx5: Continue driver initialization despite debugfs failure
  net/mlx5: Fold the modify lag code into function
  net/mlx5: Add lag affinity info to log
  net/mlx5: Split the activate lag function into two routines
  net/mlx5: E-Switch, Introduce flow counter affinity
  IB/mlx5: Unify e-switch representors load approach between uplink and VFs
  net/mlx5: Use lowercase 'X' for hex values
  net/mlx5: Remove duplicated include from eswitch.c
  net/mlx5: Remove the get protocol device interface entry
  net/mlx5: Support extended destination format in flow steering command
  net/mlx5: E-Switch, Change vhca id valid bool field to bit flag
  net/mlx5: Introduce extended destination fields
  net/mlx5: Revise gre and nvgre key formats
  net/mlx5: Add monitor commands layout and event data
  net/mlx5: Add support for plugged-disabled cable status in PME
  net/mlx5: Add support for PCIe power slot exceeded error in PME
  net/mlx5: Rework handling of port module events
  net/mlx5: Move flow counters data structures from flow steering header
  ...
parents bd1c24cc 71bef2fd

drivers/infiniband/hw/mlx5/cq.c

+4 −4
Original line number Diff line number Diff line
@@ -82,7 +82,7 @@ static void *get_sw_cqe(struct mlx5_ib_cq *cq, int n) 


	cqe64 = (cq->mcq.cqe_sz == 64) ? cqe : cqe + 64;



	if (likely((cqe64->op_own) >> 4 != MLX5_CQE_INVALID) &&

	if (likely(get_cqe_opcode(cqe64) != MLX5_CQE_INVALID) &&

	    !((cqe64->op_own & MLX5_CQE_OWNER_MASK) ^ !!(n & (cq->ibcq.cqe + 1)))) {

		return cqe;

	} else {
@@ -197,7 +197,7 @@ static void handle_responder(struct ib_wc *wc, struct mlx5_cqe64 *cqe, 
	}

	wc->byte_len = be32_to_cpu(cqe->byte_cnt);



	switch (cqe->op_own >> 4) {

	switch (get_cqe_opcode(cqe)) {

	case MLX5_CQE_RESP_WR_IMM:

		wc->opcode	= IB_WC_RECV_RDMA_WITH_IMM;

		wc->wc_flags	= IB_WC_WITH_IMM;
@@ -446,7 +446,7 @@ static int mlx5_poll_one(struct mlx5_ib_cq *cq, 
	 */

	rmb();



	opcode = cqe64->op_own >> 4;

	opcode = get_cqe_opcode(cqe64);

	if (unlikely(opcode == MLX5_CQE_RESIZE_CQ)) {

		if (likely(cq->resize_buf)) {

			free_cq_buf(dev, &cq->buf);
@@ -1203,7 +1203,7 @@ static int copy_resize_cqes(struct mlx5_ib_cq *cq) 
		return -EINVAL;

	}



	while ((scqe64->op_own >> 4) != MLX5_CQE_RESIZE_CQ) {

	while (get_cqe_opcode(scqe64) != MLX5_CQE_RESIZE_CQ) {

		dcqe = mlx5_frag_buf_get_wqe(&cq->resize_buf->fbc,

					     (i + 1) & cq->resize_buf->nent);

		dcqe64 = dsize == 64 ? dcqe : dcqe + 64;

drivers/infiniband/hw/mlx5/ib_rep.c

+10 −1
Original line number Diff line number Diff line
@@ -48,13 +48,21 @@ static const struct mlx5_ib_profile rep_profile = { 
static int

mlx5_ib_nic_rep_load(struct mlx5_core_dev *dev, struct mlx5_eswitch_rep *rep)

{

	struct mlx5_ib_dev *ibdev;



	ibdev = mlx5_ib_rep_to_dev(rep);

	if (!__mlx5_ib_add(ibdev, ibdev->profile))

		return -EINVAL;

	return 0;

}



static void

mlx5_ib_nic_rep_unload(struct mlx5_eswitch_rep *rep)

{

	rep->rep_if[REP_IB].priv = NULL;

	struct mlx5_ib_dev *ibdev;



	ibdev = mlx5_ib_rep_to_dev(rep);

	__mlx5_ib_remove(ibdev, ibdev->profile, MLX5_IB_STAGE_MAX);

}



static int
@@ -89,6 +97,7 @@ mlx5_ib_vport_rep_unload(struct mlx5_eswitch_rep *rep) 
	dev = mlx5_ib_rep_to_dev(rep);

	__mlx5_ib_remove(dev, dev->profile, MLX5_IB_STAGE_MAX);

	rep->rep_if[REP_IB].priv = NULL;

	ib_dealloc_device(&dev->ib_dev);

}



static void *mlx5_ib_vport_get_proto_dev(struct mlx5_eswitch_rep *rep)

drivers/infiniband/hw/mlx5/main.c

+11 −22
Original line number Diff line number Diff line
@@ -2681,11 +2681,11 @@ static int parse_flow_attr(struct mlx5_core_dev *mdev, u32 *match_c, 
			 ntohs(ib_spec->gre.val.protocol));



		memcpy(MLX5_ADDR_OF(fte_match_set_misc, misc_params_c,

				    gre_key_h),

				    gre_key.nvgre.hi),

		       &ib_spec->gre.mask.key,

		       sizeof(ib_spec->gre.mask.key));

		memcpy(MLX5_ADDR_OF(fte_match_set_misc, misc_params_v,

				    gre_key_h),

				    gre_key.nvgre.hi),

		       &ib_spec->gre.val.key,

		       sizeof(ib_spec->gre.val.key));

		break;
@@ -6250,18 +6250,6 @@ static void mlx5_ib_stage_delay_drop_cleanup(struct mlx5_ib_dev *dev) 
	cancel_delay_drop(dev);

}



static int mlx5_ib_stage_rep_reg_init(struct mlx5_ib_dev *dev)

{

	mlx5_ib_register_vport_reps(dev);



	return 0;

}



static void mlx5_ib_stage_rep_reg_cleanup(struct mlx5_ib_dev *dev)

{

	mlx5_ib_unregister_vport_reps(dev);

}



static int mlx5_ib_stage_dev_notifier_init(struct mlx5_ib_dev *dev)

{

	dev->mdev_events.notifier_call = mlx5_ib_event;
@@ -6300,8 +6288,6 @@ void __mlx5_ib_remove(struct mlx5_ib_dev *dev, 
		if (profile->stage[stage].cleanup)

			profile->stage[stage].cleanup(dev);

	}



	ib_dealloc_device((struct ib_device *)dev);

}



void *__mlx5_ib_add(struct mlx5_ib_dev *dev,
@@ -6429,9 +6415,6 @@ static const struct mlx5_ib_profile nic_rep_profile = { 
	STAGE_CREATE(MLX5_IB_STAGE_POST_IB_REG_UMR,

		     mlx5_ib_stage_post_ib_reg_umr_init,

		     NULL),

	STAGE_CREATE(MLX5_IB_STAGE_REP_REG,

		     mlx5_ib_stage_rep_reg_init,

		     mlx5_ib_stage_rep_reg_cleanup),

};



static void *mlx5_ib_add_slave_port(struct mlx5_core_dev *mdev)
@@ -6499,8 +6482,9 @@ static void *mlx5_ib_add(struct mlx5_core_dev *mdev) 
	if (MLX5_ESWITCH_MANAGER(mdev) &&

	    mlx5_ib_eswitch_mode(mdev->priv.eswitch) == SRIOV_OFFLOADS) {

		dev->rep = mlx5_ib_vport_rep(mdev->priv.eswitch, 0);



		return __mlx5_ib_add(dev, &nic_rep_profile);

		dev->profile = &nic_rep_profile;

		mlx5_ib_register_vport_reps(dev);

		return dev;

	}



	return __mlx5_ib_add(dev, &pf_profile);
@@ -6522,7 +6506,12 @@ static void mlx5_ib_remove(struct mlx5_core_dev *mdev, void *context) 
	}



	dev = context;

	if (dev->profile == &nic_rep_profile)

		mlx5_ib_unregister_vport_reps(dev);

	else

		__mlx5_ib_remove(dev, dev->profile, MLX5_IB_STAGE_MAX);



	ib_dealloc_device((struct ib_device *)dev);

}



static struct mlx5_interface mlx5_ib_interface = {

drivers/infiniband/hw/mlx5/mlx5_ib.h

+0 −1
Original line number Diff line number Diff line
@@ -789,7 +789,6 @@ enum mlx5_ib_stages { 
	MLX5_IB_STAGE_POST_IB_REG_UMR,

	MLX5_IB_STAGE_DELAY_DROP,

	MLX5_IB_STAGE_CLASS_ATTR,

	MLX5_IB_STAGE_REP_REG,

	MLX5_IB_STAGE_MAX,

};

drivers/net/ethernet/mellanox/mlx5/core/cmd.c

+4 −0
Original line number Diff line number Diff line
@@ -373,6 +373,8 @@ static int mlx5_internal_err_ret_value(struct mlx5_core_dev *dev, u16 op, 
	case MLX5_CMD_OP_QUERY_VPORT_COUNTER:

	case MLX5_CMD_OP_ALLOC_Q_COUNTER:

	case MLX5_CMD_OP_QUERY_Q_COUNTER:

	case MLX5_CMD_OP_SET_MONITOR_COUNTER:

	case MLX5_CMD_OP_ARM_MONITOR_COUNTER:

	case MLX5_CMD_OP_SET_PP_RATE_LIMIT:

	case MLX5_CMD_OP_QUERY_RATE_LIMIT:

	case MLX5_CMD_OP_CREATE_SCHEDULING_ELEMENT:
@@ -522,6 +524,8 @@ const char *mlx5_command_str(int command) 
	MLX5_COMMAND_STR_CASE(ALLOC_Q_COUNTER);

	MLX5_COMMAND_STR_CASE(DEALLOC_Q_COUNTER);

	MLX5_COMMAND_STR_CASE(QUERY_Q_COUNTER);

	MLX5_COMMAND_STR_CASE(SET_MONITOR_COUNTER);

	MLX5_COMMAND_STR_CASE(ARM_MONITOR_COUNTER);

	MLX5_COMMAND_STR_CASE(SET_PP_RATE_LIMIT);

	MLX5_COMMAND_STR_CASE(QUERY_RATE_LIMIT);

	MLX5_COMMAND_STR_CASE(CREATE_SCHEDULING_ELEMENT);