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Commit ec26016b authored by Andrew Lunn's avatar Andrew Lunn Committed by David S. Miller
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net: dsa: mv88e6xxx: SERDES support 2500BaseT via external PHY 



By using an external PHY, ports 9 and 10 can support 2500BaseT.
So set this link mode in the mask when validating.

Signed-off-by: default avatarAndrew Lunn <andrew@lunn.ch>
Signed-off-by: default avatarHeiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 132c4e9e

drivers/net/dsa/mv88e6xxx/chip.c

+3 −1
Original line number Diff line number Diff line
@@ -647,8 +647,10 @@ static void mv88e6390_phylink_validate(struct mv88e6xxx_chip *chip, int port, 
				       unsigned long *mask,

				       struct phylink_link_state *state)

{

	if (port >= 9)

	if (port >= 9) {

		phylink_set(mask, 2500baseX_Full);

		phylink_set(mask, 2500baseT_Full);

	}



	/* No ethtool bits for 200Mbps */

	phylink_set(mask, 1000baseT_Full);