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Commit ebbb293f authored by Giuseppe CAVALLARO's avatar Giuseppe CAVALLARO Committed by David S. Miller
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stmmac: consolidate and tidy-up the COE support



The first version of the driver had hard-coded the logic
for handling the checksum offloading.
This was designed according to the chips included in
the STM platforms where:
o MAC10/100 supports no COE at all.
o GMAC fully supports RX/TX COE.

This is not good for other chip configurations where,
for example, the mac10/100 supports the tx csum in HW
or when the GMAC has no IPC.

Thanks to Johannes Stezenbach; he provided me a first
draft of this patch that only reviewed the IPC for the
GMAC devices.

This patch also helps on SPEAr platforms where the
MAC10/100 can perform the TX csum in HW.
Thanks to Deepak SIKRI for his support on this.

In the end, GMAC devices for STM platforms have
a bugged Jumbo frame support that needs to have
the Tx COE disabled for oversized frames (due to
limited buffer sizes). This information is also
passed through the driver's platform structure.

Signed-off-by: default avatarGiuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: default avatarJohannes Stezenbach <js@sig21.net>
Signed-off-by: default avatarDeepak SIKRI <deepak.sikri@st.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent dfb8fb96
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+2 −2
Original line number Original line Diff line number Diff line
@@ -102,8 +102,6 @@ struct stmmac_extra_stats {


#define SF_DMA_MODE 1 /* DMA STORE-AND-FORWARD Operation Mode */
#define SF_DMA_MODE 1 /* DMA STORE-AND-FORWARD Operation Mode */


#define HW_CSUM 1
#define NO_HW_CSUM 0
enum rx_frame_status { /* IPC status */
enum rx_frame_status { /* IPC status */
	good_frame = 0,
	good_frame = 0,
	discard_frame = 1,
	discard_frame = 1,
@@ -205,6 +203,8 @@ struct stmmac_dma_ops {
struct stmmac_ops {
struct stmmac_ops {
	/* MAC core initialization */
	/* MAC core initialization */
	void (*core_init) (void __iomem *ioaddr) ____cacheline_aligned;
	void (*core_init) (void __iomem *ioaddr) ____cacheline_aligned;
	/* Support checksum offload engine */
	int  (*rx_coe) (void __iomem *ioaddr);
	/* Dump MAC registers */
	/* Dump MAC registers */
	void (*dump_regs) (void __iomem *ioaddr);
	void (*dump_regs) (void __iomem *ioaddr);
	/* Handle extra events on specific interrupts hw dependent */
	/* Handle extra events on specific interrupts hw dependent */
+1 −1
Original line number Original line Diff line number Diff line
@@ -99,7 +99,7 @@ enum inter_frame_gap {
#define GMAC_CONTROL_RE		0x00000004 /* Receiver Enable */
#define GMAC_CONTROL_RE		0x00000004 /* Receiver Enable */


#define GMAC_CORE_INIT (GMAC_CONTROL_JD | GMAC_CONTROL_PS | GMAC_CONTROL_ACS | \
#define GMAC_CORE_INIT (GMAC_CONTROL_JD | GMAC_CONTROL_PS | GMAC_CONTROL_ACS | \
			GMAC_CONTROL_IPC | GMAC_CONTROL_JE | GMAC_CONTROL_BE)
			GMAC_CONTROL_JE | GMAC_CONTROL_BE)


/* GMAC Frame Filter defines */
/* GMAC Frame Filter defines */
#define GMAC_FRAME_FILTER_PR	0x00000001	/* Promiscuous Mode */
#define GMAC_FRAME_FILTER_PR	0x00000001	/* Promiscuous Mode */
+13 −0
Original line number Original line Diff line number Diff line
@@ -50,6 +50,18 @@ static void dwmac1000_core_init(void __iomem *ioaddr)
#endif
#endif
}
}


static int dwmac1000_rx_coe_supported(void __iomem *ioaddr)
{
	u32 value = readl(ioaddr + GMAC_CONTROL);

	value |= GMAC_CONTROL_IPC;
	writel(value, ioaddr + GMAC_CONTROL);

	value = readl(ioaddr + GMAC_CONTROL);

	return !!(value & GMAC_CONTROL_IPC);
}

static void dwmac1000_dump_regs(void __iomem *ioaddr)
static void dwmac1000_dump_regs(void __iomem *ioaddr)
{
{
	int i;
	int i;
@@ -202,6 +214,7 @@ static void dwmac1000_irq_status(void __iomem *ioaddr)


struct stmmac_ops dwmac1000_ops = {
struct stmmac_ops dwmac1000_ops = {
	.core_init = dwmac1000_core_init,
	.core_init = dwmac1000_core_init,
	.rx_coe = dwmac1000_rx_coe_supported,
	.dump_regs = dwmac1000_dump_regs,
	.dump_regs = dwmac1000_dump_regs,
	.host_irq_status = dwmac1000_irq_status,
	.host_irq_status = dwmac1000_irq_status,
	.set_filter = dwmac1000_set_filter,
	.set_filter = dwmac1000_set_filter,
+6 −0
Original line number Original line Diff line number Diff line
@@ -42,6 +42,11 @@ static void dwmac100_core_init(void __iomem *ioaddr)
#endif
#endif
}
}


static int dwmac100_rx_coe_supported(void __iomem *ioaddr)
{
	return 0;
}

static void dwmac100_dump_mac_regs(void __iomem *ioaddr)
static void dwmac100_dump_mac_regs(void __iomem *ioaddr)
{
{
	pr_info("\t----------------------------------------------\n"
	pr_info("\t----------------------------------------------\n"
@@ -165,6 +170,7 @@ static void dwmac100_pmt(void __iomem *ioaddr, unsigned long mode)


struct stmmac_ops dwmac100_ops = {
struct stmmac_ops dwmac100_ops = {
	.core_init = dwmac100_core_init,
	.core_init = dwmac100_core_init,
	.rx_coe = dwmac100_rx_coe_supported,
	.dump_regs = dwmac100_dump_mac_regs,
	.dump_regs = dwmac100_dump_mac_regs,
	.host_irq_status = dwmac100_irq_status,
	.host_irq_status = dwmac100_irq_status,
	.set_filter = dwmac100_set_filter,
	.set_filter = dwmac100_set_filter,
+3 −1
Original line number Original line Diff line number Diff line
@@ -51,7 +51,6 @@ struct stmmac_priv {
	int is_gmac;
	int is_gmac;
	dma_addr_t dma_rx_phy;
	dma_addr_t dma_rx_phy;
	unsigned int dma_rx_size;
	unsigned int dma_rx_size;
	int rx_csum;
	unsigned int dma_buf_sz;
	unsigned int dma_buf_sz;
	struct device *device;
	struct device *device;
	struct mac_device_info *hw;
	struct mac_device_info *hw;
@@ -92,6 +91,9 @@ struct stmmac_priv {
	struct vlan_group *vlgrp;
	struct vlan_group *vlgrp;
#endif
#endif
	int enh_desc;
	int enh_desc;
	int rx_coe;
	int bugged_jumbo;
	int no_csum_insertion;
};
};


#ifdef CONFIG_STM_DRIVERS
#ifdef CONFIG_STM_DRIVERS
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