Loading bindings/interrupt-controller/qcom,mpm.txt +1 −0 Original line number Diff line number Diff line Loading @@ -24,6 +24,7 @@ Properties: Definition: Should contain "qcom,mpm-gic" and the respective target compatible flag from below ones. "qcom,mpm-gic-holi" "qcom,mpm-gic-scuba" - interrupts: Usage: required Loading qcom/scuba-iot.dtsi +11 −0 Original line number Diff line number Diff line Loading @@ -276,6 +276,17 @@ interrupts = <1 9 4>; }; wakegic: wake-gic { compatible = "qcom,mpm-gic-scuba", "qcom,mpm"; interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>; reg = <0x45f01b8 0x1000>, <0x0f40000c 0x4>; /* MSM_APCS_GCC_BASE 4K */ reg-names = "vmpm", "ipc"; qcom,num-mpm-irqs = <96>; interrupt-controller; interrupt-parent = <&intc>; #interrupt-cells = <2>; }; timer { compatible = "arm,armv8-timer"; Loading Loading
bindings/interrupt-controller/qcom,mpm.txt +1 −0 Original line number Diff line number Diff line Loading @@ -24,6 +24,7 @@ Properties: Definition: Should contain "qcom,mpm-gic" and the respective target compatible flag from below ones. "qcom,mpm-gic-holi" "qcom,mpm-gic-scuba" - interrupts: Usage: required Loading
qcom/scuba-iot.dtsi +11 −0 Original line number Diff line number Diff line Loading @@ -276,6 +276,17 @@ interrupts = <1 9 4>; }; wakegic: wake-gic { compatible = "qcom,mpm-gic-scuba", "qcom,mpm"; interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>; reg = <0x45f01b8 0x1000>, <0x0f40000c 0x4>; /* MSM_APCS_GCC_BASE 4K */ reg-names = "vmpm", "ipc"; qcom,num-mpm-irqs = <96>; interrupt-controller; interrupt-parent = <&intc>; #interrupt-cells = <2>; }; timer { compatible = "arm,armv8-timer"; Loading