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Commit eb0c9525 authored by Mohana Basava Tejesh Reddy Mareddy's avatar Mohana Basava Tejesh Reddy Mareddy
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msm: mhi_dev: Update msi_disable on fetching MSI config 



Fix for the timing difference between host writing into MSI
capability register and MHI MMIO init where the first instance
of setting or resetting the msi_disable flag. Hence, updating
the msi_disable flag on fetching the MSI config from PCIe.
This will ensure to update the flag value in the case of EP
reading the MSI capability register before the host sets it.

Change-Id: I508a85e7107ee5a575fc03d54ab3e445049d73b2
Signed-off-by: default avatarMohana Basava Tejesh Reddy Mareddy <quic_mmareddy@quicinc.com>
parent 1a1dccc4

drivers/platform/msm/mhi_dev/mhi.c

+53 −41
Original line number Diff line number Diff line
@@ -103,6 +103,38 @@ static DECLARE_COMPLETION(write_to_host); 
static DECLARE_COMPLETION(transfer_host_to_device);

static DECLARE_COMPLETION(transfer_device_to_host);



/*

 * mhi_dev_get_msi_config () - Fetch the MSI config from

 * PCIe and set the msi_disable flag accordingly

 *

 * @phandle : phandle structure

 * @cfg :     PCIe MSI config structure

 */

static int mhi_dev_get_msi_config(struct ep_pcie_hw *phandle,

					struct ep_pcie_msi_config *cfg)

{

	int rc;



	/*

	 * Fetching MSI config to read the MSI capability and setting the

	 * msi_disable flag based on it.

	 */

	rc = ep_pcie_get_msi_config(phandle, cfg);

	if (rc == -EOPNOTSUPP) {

		mhi_log(MHI_MSG_VERBOSE, "MSI is disabled\n");

		mhi_ctx->msi_disable = true;

	} else if (!rc) {

		mhi_ctx->msi_disable = false;

	} else {

		mhi_log(MHI_MSG_ERROR,

			"Error retrieving pcie msi logic\n");

		return rc;

	}



	mhi_log(MHI_MSG_VERBOSE, "msi_disable = %d\n", mhi_ctx->msi_disable);

	return 0;

}



/*

 * mhi_dev_ring_cache_completion_cb () - Call back function called

 * by IPA driver when ring element cache is done
@@ -280,16 +312,16 @@ static int mhi_dev_schedule_msi_ipa(struct mhi_dev *mhi, struct event_req *ereq) 
	union mhi_dev_ring_ctx *ctx;

	int rc;



	rc = ep_pcie_get_msi_config(mhi->phandle, &cfg);

	if (rc == -EOPNOTSUPP) {

		mhi_log(MHI_MSG_VERBOSE, "MSI is disabled\n");

		mhi_ctx->msi_disable = true;

		return 0;

	} else if (rc) {

	rc = mhi_dev_get_msi_config(mhi->phandle, &cfg);

	if (rc) {

		mhi_log(MHI_MSG_ERROR, "Error retrieving pcie msi logic\n");

		return rc;

	}



	/* If MSI is disabled, bailing out */

	if (mhi_ctx->msi_disable)

		return 0;



	ctx = (union mhi_dev_ring_ctx *)&mhi->ev_ctx_cache[ereq->event_ring];



	msi_addr.size = sizeof(uint32_t);
@@ -436,17 +468,16 @@ static int mhi_trigger_msi_edma(struct mhi_dev_ring *ring, u32 idx) 
	unsigned long flags;



	if (!mhi_ctx->msi_lower) {

		rc = ep_pcie_get_msi_config(mhi_ctx->phandle, &cfg);

		if (rc == -EOPNOTSUPP) {

			mhi_log(MHI_MSG_VERBOSE, "MSI is disabled\n");

			mhi_ctx->msi_disable = true;

			return 0;

		} else if (rc) {

			mhi_log(MHI_MSG_ERROR,

					"Error retrieving pcie msi logic\n");

		rc = mhi_dev_get_msi_config(mhi_ctx->phandle, &cfg);

		if (rc) {

			mhi_log(MHI_MSG_ERROR, "Error retrieving pcie msi logic\n");

			return rc;

		}



		/* If MSI is disabled, bailing out */

		if (mhi_ctx->msi_disable)

			return 0;



		mhi_ctx->msi_data = cfg.data;

		mhi_ctx->msi_lower = cfg.lower;

	}
@@ -1450,13 +1481,9 @@ static int mhi_hwc_init(struct mhi_dev *mhi) 
	}



	/* Call IPA HW_ACC Init with MSI Address and db routing info */

	rc = ep_pcie_get_msi_config(mhi_ctx->phandle, &cfg);

	if (rc == -EOPNOTSUPP) {

		mhi_log(MHI_MSG_VERBOSE, "MSI is disabled\n");

		mhi_ctx->msi_disable = true;

	} else if (rc) {

		mhi_log(MHI_MSG_ERROR,

			"Error retrieving pcie msi logic\n");

	rc = mhi_dev_get_msi_config(mhi_ctx->phandle, &cfg);

	if (rc) {

		mhi_log(MHI_MSG_ERROR, "Error retrieving pcie msi logic\n");

		return rc;

	}
@@ -1671,11 +1698,8 @@ int mhi_dev_send_event(struct mhi_dev *mhi, int evnt_ring, 
	struct ep_pcie_msi_config cfg;

	struct mhi_addr transfer_addr;



	rc = ep_pcie_get_msi_config(mhi->phandle, &cfg);

	if (rc == -EOPNOTSUPP) {

		mhi_log(MHI_MSG_VERBOSE, "MSI is disabled\n");

		mhi_ctx->msi_disable = true;

	} else if (rc) {

	rc = mhi_dev_get_msi_config(mhi->phandle, &cfg);

	if (rc) {

		mhi_log(MHI_MSG_ERROR, "Error retrieving pcie msi logic\n");

		return rc;

	}
@@ -4398,24 +4422,12 @@ static int mhi_dev_resume_mmio_mhi_init(struct mhi_dev *mhi_ctx) 
		return -EINVAL;

	}



	/*

	 * Fetching MSI config to read the MSI capability and setting the

	 * msi_disable flag based on it.

	 */

	rc = ep_pcie_get_msi_config(mhi_ctx->phandle, &cfg);

	if (rc == -EOPNOTSUPP) {

		mhi_log(MHI_MSG_VERBOSE, "MSI is disabled\n");

		mhi_ctx->msi_disable = true;

	} else if (!rc) {

		mhi_ctx->msi_disable = false;

	} else {

		mhi_log(MHI_MSG_ERROR,

			"Error retrieving pcie msi logic\n");

	rc = mhi_dev_get_msi_config(mhi_ctx->phandle, &cfg);

	if (rc) {

		mhi_log(MHI_MSG_ERROR, "Error retrieving pcie msi logic\n");

		return rc;

	}



	mhi_log(MHI_MSG_VERBOSE, "msi_disable = %d\n", mhi_ctx->msi_disable);



	rc = mhi_dev_recover(mhi_ctx);

	if (rc) {

		mhi_log(MHI_MSG_ERROR, "get mhi state failed\n");