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Commit ead5c2e7 authored by Vignesh Viswanathan's avatar Vignesh Viswanathan Committed by Gerrit - the friendly Code Review server
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ARM: dts: qcom: Enable QCN9000 nodes for sdxlemur-mtp-cpe-pine2x 

Enable QCN9000 wifi, reserved memory, GPIO and PCIe nodes for
sdxlemur-mtp-cpe-pine2x.dtsi.

Change-Id: Ife764d2519b94a2b02a6f99f853bab88f5ee8841
parent 9aaf60b5

qcom/sdxlemur-mtp-cpe-pine2x.dtsi

+78 −0
Original line number Diff line number Diff line 
#include "sdxlemur-qcn9000.dtsi"



&soc {

	pine_vreg: pine_vreg {

		compatible = "regulator-fixed";

		regulator-name = "pine_vreg";

		gpio = <&tlmm 102 GPIO_ACTIVE_HIGH>;

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;

		enable-active-high;

		regulator-enable-ramp-delay = <200000>;

	};

};



&qps615_vreg {

	vin-supply = <&pine_vreg>;

};



&pcie_i2c_ctrl {

	reg_update = <0x82c030 0x1

			0x828000 0x3

			0x82bd00 0x8

			0x82c030 0x2

			0x828000 0x3

			0x82bd00 0x8

			0x82c030 0x8

			0x828000 0x1

			0x82bd00 0x8

			0x82c01c 0x10

			0x82c030 0xf

			0x828000 0xf

			0x82b268 0x2>;

};



&pcie0 {

	qcom,no-l0s-supported;

	qcom,no-l1-supported;

	qcom,no-l1ss-supported;

	qcom,no-aux-clk-sync;

};



&pcie0_bus2_dev1_fn0 {

	cnss_pci1: cnss_pci1 {

		reg = <0 0 0 0 0>;

		qcom,iommu-group = <&qcn9000_pci_iommu_group_0>;

		memory-region = <&qcn9000_0_mem>;

		qrtr_instance_id = <0x20>;



		#address-cells = <1>;

		#size-cells = <1>;

	};

};



&pcie0_bus2_dev2_fn0 {

	cnss_pci2: cnss_pci2 {

		reg = <0 0 0 0 0>;

		qcom,iommu-group = <&qcn9000_pci_iommu_group_1>;

		memory-region = <&qcn9000_1_mem>;

		qrtr_instance_id = <0x21>;



		#address-cells = <1>;

		#size-cells = <1>;

	};

};



&wifi0 {

	status = "ok";

	board_id = <0xa0>;

};



&wifi1 {

	status = "ok";

	board_id = <0xa1>;

};



&qcn9000_0_mem {

	status = "ok";

};



&qcn9000_1_mem {

	status = "ok";

};