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Commit eac66686 authored by Sunil Goutham's avatar Sunil Goutham Committed by David S. Miller
Browse files

octeontx2-af: Convert mbox handlers APIs to lowercase 



This patch converts all mailbox message handler API
names to lowercase.

Signed-off-by: default avatarSunil Goutham <sgoutham@marvell.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 93c3de3e

drivers/net/ethernet/marvell/octeontx2/af/mbox.c

+1 −1
Original line number Diff line number Diff line
@@ -290,7 +290,7 @@ EXPORT_SYMBOL(otx2_mbox_nonempty); 
const char *otx2_mbox_id2name(u16 id)

{

	switch (id) {

#define M(_name, _id, _1, _2) case _id: return # _name;

#define M(_name, _id, _1, _2, _3) case _id: return # _name;

	MBOX_MESSAGES

#undef M

	default:

drivers/net/ethernet/marvell/octeontx2/af/mbox.h

+39 −34
Original line number Diff line number Diff line
@@ -120,54 +120,59 @@ static inline struct mbox_msghdr *otx2_mbox_alloc_msg(struct otx2_mbox *mbox, 


#define MBOX_MESSAGES							\

/* Generic mbox IDs (range 0x000 - 0x1FF) */				\

M(READY,		0x001, msg_req, ready_msg_rsp)			\

M(ATTACH_RESOURCES,	0x002, rsrc_attach, msg_rsp)			\

M(DETACH_RESOURCES,	0x003, rsrc_detach, msg_rsp)			\

M(MSIX_OFFSET,		0x004, msg_req, msix_offset_rsp)		\

M(READY,		0x001, ready, msg_req, ready_msg_rsp)		\

M(ATTACH_RESOURCES,	0x002, attach_resources, rsrc_attach, msg_rsp)	\

M(DETACH_RESOURCES,	0x003, detach_resources, rsrc_detach, msg_rsp)	\

M(MSIX_OFFSET,		0x004, msix_offset, msg_req, msix_offset_rsp)	\

/* CGX mbox IDs (range 0x200 - 0x3FF) */				\

M(CGX_START_RXTX,	0x200, msg_req, msg_rsp)			\

M(CGX_STOP_RXTX,	0x201, msg_req, msg_rsp)			\

M(CGX_STATS,		0x202, msg_req, cgx_stats_rsp)			\

M(CGX_MAC_ADDR_SET,	0x203, cgx_mac_addr_set_or_get,			\

M(CGX_START_RXTX,	0x200, cgx_start_rxtx, msg_req, msg_rsp)	\

M(CGX_STOP_RXTX,	0x201, cgx_stop_rxtx, msg_req, msg_rsp)		\

M(CGX_STATS,		0x202, cgx_stats, msg_req, cgx_stats_rsp)	\

M(CGX_MAC_ADDR_SET,	0x203, cgx_mac_addr_set, cgx_mac_addr_set_or_get,    \

				cgx_mac_addr_set_or_get)		\

M(CGX_MAC_ADDR_GET,	0x204, cgx_mac_addr_set_or_get,			\

M(CGX_MAC_ADDR_GET,	0x204, cgx_mac_addr_get, cgx_mac_addr_set_or_get,    \

				cgx_mac_addr_set_or_get)		\

M(CGX_PROMISC_ENABLE,	0x205, msg_req, msg_rsp)			\

M(CGX_PROMISC_DISABLE,	0x206, msg_req, msg_rsp)			\

M(CGX_START_LINKEVENTS, 0x207, msg_req, msg_rsp)			\

M(CGX_STOP_LINKEVENTS,	0x208, msg_req, msg_rsp)			\

M(CGX_GET_LINKINFO,	0x209, msg_req, cgx_link_info_msg)		\

M(CGX_INTLBK_ENABLE,	0x20A, msg_req, msg_rsp)			\

M(CGX_INTLBK_DISABLE,	0x20B, msg_req, msg_rsp)			\

M(CGX_PROMISC_ENABLE,	0x205, cgx_promisc_enable, msg_req, msg_rsp)	\

M(CGX_PROMISC_DISABLE,	0x206, cgx_promisc_disable, msg_req, msg_rsp)	\

M(CGX_START_LINKEVENTS, 0x207, cgx_start_linkevents, msg_req, msg_rsp)	\

M(CGX_STOP_LINKEVENTS,	0x208, cgx_stop_linkevents, msg_req, msg_rsp)	\

M(CGX_GET_LINKINFO,	0x209, cgx_get_linkinfo, msg_req, cgx_link_info_msg) \

M(CGX_INTLBK_ENABLE,	0x20A, cgx_intlbk_enable, msg_req, msg_rsp)	\

M(CGX_INTLBK_DISABLE,	0x20B, cgx_intlbk_disable, msg_req, msg_rsp)	\

/* NPA mbox IDs (range 0x400 - 0x5FF) */				\

M(NPA_LF_ALLOC,		0x400, npa_lf_alloc_req, npa_lf_alloc_rsp)	\

M(NPA_LF_FREE,		0x401, msg_req, msg_rsp)			\

M(NPA_AQ_ENQ,		0x402, npa_aq_enq_req, npa_aq_enq_rsp)		\

M(NPA_HWCTX_DISABLE,	0x403, hwctx_disable_req, msg_rsp)		\

M(NPA_LF_ALLOC,		0x400, npa_lf_alloc,				\

				npa_lf_alloc_req, npa_lf_alloc_rsp)	\

M(NPA_LF_FREE,		0x401, npa_lf_free, msg_req, msg_rsp)		\

M(NPA_AQ_ENQ,		0x402, npa_aq_enq, npa_aq_enq_req, npa_aq_enq_rsp)   \

M(NPA_HWCTX_DISABLE,	0x403, npa_hwctx_disable, hwctx_disable_req, msg_rsp)\

/* SSO/SSOW mbox IDs (range 0x600 - 0x7FF) */				\

/* TIM mbox IDs (range 0x800 - 0x9FF) */				\

/* CPT mbox IDs (range 0xA00 - 0xBFF) */				\

/* NPC mbox IDs (range 0x6000 - 0x7FFF) */				\

/* NIX mbox IDs (range 0x8000 - 0xFFFF) */				\

M(NIX_LF_ALLOC,		0x8000, nix_lf_alloc_req, nix_lf_alloc_rsp)	\

M(NIX_LF_FREE,		0x8001, msg_req, msg_rsp)			\

M(NIX_AQ_ENQ,		0x8002, nix_aq_enq_req, nix_aq_enq_rsp)		\

M(NIX_HWCTX_DISABLE,	0x8003, hwctx_disable_req, msg_rsp)		\

M(NIX_TXSCH_ALLOC,	0x8004, nix_txsch_alloc_req, nix_txsch_alloc_rsp) \

M(NIX_TXSCH_FREE,	0x8005, nix_txsch_free_req, msg_rsp)		\

M(NIX_TXSCHQ_CFG,	0x8006, nix_txschq_config, msg_rsp)		\

M(NIX_STATS_RST,	0x8007, msg_req, msg_rsp)			\

M(NIX_VTAG_CFG,	0x8008, nix_vtag_config, msg_rsp)		\

M(NIX_RSS_FLOWKEY_CFG,  0x8009, nix_rss_flowkey_cfg, msg_rsp)		\

M(NIX_SET_MAC_ADDR,	0x800a, nix_set_mac_addr, msg_rsp)		\

M(NIX_SET_RX_MODE,	0x800b, nix_rx_mode, msg_rsp)

M(NIX_LF_ALLOC,		0x8000, nix_lf_alloc,				\

				 nix_lf_alloc_req, nix_lf_alloc_rsp)	\

M(NIX_LF_FREE,		0x8001, nix_lf_free, msg_req, msg_rsp)		\

M(NIX_AQ_ENQ,		0x8002, nix_aq_enq, nix_aq_enq_req, nix_aq_enq_rsp)  \

M(NIX_HWCTX_DISABLE,	0x8003, nix_hwctx_disable,			\

				 hwctx_disable_req, msg_rsp)		\

M(NIX_TXSCH_ALLOC,	0x8004, nix_txsch_alloc,			\

				 nix_txsch_alloc_req, nix_txsch_alloc_rsp)   \

M(NIX_TXSCH_FREE,	0x8005, nix_txsch_free, nix_txsch_free_req, msg_rsp) \

M(NIX_TXSCHQ_CFG,	0x8006, nix_txschq_cfg, nix_txschq_config, msg_rsp)  \

M(NIX_STATS_RST,	0x8007, nix_stats_rst, msg_req, msg_rsp)	\

M(NIX_VTAG_CFG,		0x8008, nix_vtag_cfg, nix_vtag_config, msg_rsp)	\

M(NIX_RSS_FLOWKEY_CFG,  0x8009, nix_rss_flowkey_cfg,			\

				 nix_rss_flowkey_cfg, msg_rsp)		\

M(NIX_SET_MAC_ADDR,	0x800a, nix_set_mac_addr, nix_set_mac_addr, msg_rsp) \

M(NIX_SET_RX_MODE,	0x800b, nix_set_rx_mode, nix_rx_mode, msg_rsp)



/* Messages initiated by AF (range 0xC00 - 0xDFF) */

#define MBOX_UP_CGX_MESSAGES						\

M(CGX_LINK_EVENT,		0xC00, cgx_link_info_msg, msg_rsp)

M(CGX_LINK_EVENT,	0xC00, cgx_link_event, cgx_link_info_msg, msg_rsp)



enum {

#define M(_name, _id, _1, _2) MBOX_MSG_ ## _name = _id,

#define M(_name, _id, _1, _2, _3) MBOX_MSG_ ## _name = _id,

MBOX_MESSAGES

MBOX_UP_CGX_MESSAGES

#undef M

drivers/net/ethernet/marvell/octeontx2/af/rvu.c

+8 −8
Original line number Diff line number Diff line
@@ -830,7 +830,7 @@ int rvu_aq_alloc(struct rvu *rvu, struct admin_queue **ad_queue, 
	return 0;

}



static int rvu_mbox_handler_READY(struct rvu *rvu, struct msg_req *req,

static int rvu_mbox_handler_ready(struct rvu *rvu, struct msg_req *req,

				  struct ready_msg_rsp *rsp)

{

	return 0;
@@ -960,7 +960,7 @@ static int rvu_detach_rsrcs(struct rvu *rvu, struct rsrc_detach *detach, 
	return 0;

}



static int rvu_mbox_handler_DETACH_RESOURCES(struct rvu *rvu,

static int rvu_mbox_handler_detach_resources(struct rvu *rvu,

					     struct rsrc_detach *detach,

					     struct msg_rsp *rsp)

{
@@ -1108,7 +1108,7 @@ static int rvu_check_rsrc_availability(struct rvu *rvu, 
	return -ENOSPC;

}



static int rvu_mbox_handler_ATTACH_RESOURCES(struct rvu *rvu,

static int rvu_mbox_handler_attach_resources(struct rvu *rvu,

					     struct rsrc_attach *attach,

					     struct msg_rsp *rsp)

{
@@ -1231,7 +1231,7 @@ static void rvu_clear_msix_offset(struct rvu *rvu, struct rvu_pfvf *pfvf, 
	rvu_free_rsrc_contig(&pfvf->msix, nvecs, offset);

}



static int rvu_mbox_handler_MSIX_OFFSET(struct rvu *rvu, struct msg_req *req,

static int rvu_mbox_handler_msix_offset(struct rvu *rvu, struct msg_req *req,

					struct msix_offset_rsp *rsp)

{

	struct rvu_hwinfo *hw = rvu->hw;
@@ -1288,7 +1288,7 @@ static int rvu_process_mbox_msg(struct rvu *rvu, int devid, 
		goto bad_message;



	switch (req->id) {

#define M(_name, _id, _req_type, _rsp_type)				\

#define M(_name, _id, _fn_name, _req_type, _rsp_type)			\

	case _id: {							\

		struct _rsp_type *rsp;					\

		int err;						\
@@ -1303,7 +1303,7 @@ static int rvu_process_mbox_msg(struct rvu *rvu, int devid, 
			rsp->hdr.rc = 0;				\

		}							\

									\

		err = rvu_mbox_handler_ ## _name(rvu,			\

		err = rvu_mbox_handler_ ## _fn_name(rvu,		\

						    (struct _req_type *)req, \

						    rsp);		\

		if (rsp && err)						\

drivers/net/ethernet/marvell/octeontx2/af/rvu.h

+28 −28
Original line number Diff line number Diff line
@@ -270,84 +270,84 @@ int rvu_cgx_probe(struct rvu *rvu); 
void rvu_cgx_wq_destroy(struct rvu *rvu);

void *rvu_cgx_pdata(u8 cgx_id, struct rvu *rvu);

int rvu_cgx_config_rxtx(struct rvu *rvu, u16 pcifunc, bool start);

int rvu_mbox_handler_CGX_START_RXTX(struct rvu *rvu, struct msg_req *req,

int rvu_mbox_handler_cgx_start_rxtx(struct rvu *rvu, struct msg_req *req,

				    struct msg_rsp *rsp);

int rvu_mbox_handler_CGX_STOP_RXTX(struct rvu *rvu, struct msg_req *req,

int rvu_mbox_handler_cgx_stop_rxtx(struct rvu *rvu, struct msg_req *req,

				   struct msg_rsp *rsp);

int rvu_mbox_handler_CGX_STATS(struct rvu *rvu, struct msg_req *req,

int rvu_mbox_handler_cgx_stats(struct rvu *rvu, struct msg_req *req,

			       struct cgx_stats_rsp *rsp);

int rvu_mbox_handler_CGX_MAC_ADDR_SET(struct rvu *rvu,

int rvu_mbox_handler_cgx_mac_addr_set(struct rvu *rvu,

				      struct cgx_mac_addr_set_or_get *req,

				      struct cgx_mac_addr_set_or_get *rsp);

int rvu_mbox_handler_CGX_MAC_ADDR_GET(struct rvu *rvu,

int rvu_mbox_handler_cgx_mac_addr_get(struct rvu *rvu,

				      struct cgx_mac_addr_set_or_get *req,

				      struct cgx_mac_addr_set_or_get *rsp);

int rvu_mbox_handler_CGX_PROMISC_ENABLE(struct rvu *rvu, struct msg_req *req,

int rvu_mbox_handler_cgx_promisc_enable(struct rvu *rvu, struct msg_req *req,

					struct msg_rsp *rsp);

int rvu_mbox_handler_CGX_PROMISC_DISABLE(struct rvu *rvu, struct msg_req *req,

int rvu_mbox_handler_cgx_promisc_disable(struct rvu *rvu, struct msg_req *req,

					 struct msg_rsp *rsp);

int rvu_mbox_handler_CGX_START_LINKEVENTS(struct rvu *rvu, struct msg_req *req,

int rvu_mbox_handler_cgx_start_linkevents(struct rvu *rvu, struct msg_req *req,

					  struct msg_rsp *rsp);

int rvu_mbox_handler_CGX_STOP_LINKEVENTS(struct rvu *rvu, struct msg_req *req,

int rvu_mbox_handler_cgx_stop_linkevents(struct rvu *rvu, struct msg_req *req,

					 struct msg_rsp *rsp);

int rvu_mbox_handler_CGX_GET_LINKINFO(struct rvu *rvu, struct msg_req *req,

int rvu_mbox_handler_cgx_get_linkinfo(struct rvu *rvu, struct msg_req *req,

				      struct cgx_link_info_msg *rsp);

int rvu_mbox_handler_CGX_INTLBK_ENABLE(struct rvu *rvu, struct msg_req *req,

int rvu_mbox_handler_cgx_intlbk_enable(struct rvu *rvu, struct msg_req *req,

				       struct msg_rsp *rsp);

int rvu_mbox_handler_CGX_INTLBK_DISABLE(struct rvu *rvu, struct msg_req *req,

int rvu_mbox_handler_cgx_intlbk_disable(struct rvu *rvu, struct msg_req *req,

					struct msg_rsp *rsp);



/* NPA APIs */

int rvu_npa_init(struct rvu *rvu);

void rvu_npa_freemem(struct rvu *rvu);

int rvu_mbox_handler_NPA_AQ_ENQ(struct rvu *rvu,

int rvu_mbox_handler_npa_aq_enq(struct rvu *rvu,

				struct npa_aq_enq_req *req,

				struct npa_aq_enq_rsp *rsp);

int rvu_mbox_handler_NPA_HWCTX_DISABLE(struct rvu *rvu,

int rvu_mbox_handler_npa_hwctx_disable(struct rvu *rvu,

				       struct hwctx_disable_req *req,

				       struct msg_rsp *rsp);

int rvu_mbox_handler_NPA_LF_ALLOC(struct rvu *rvu,

int rvu_mbox_handler_npa_lf_alloc(struct rvu *rvu,

				  struct npa_lf_alloc_req *req,

				  struct npa_lf_alloc_rsp *rsp);

int rvu_mbox_handler_NPA_LF_FREE(struct rvu *rvu, struct msg_req *req,

int rvu_mbox_handler_npa_lf_free(struct rvu *rvu, struct msg_req *req,

				 struct msg_rsp *rsp);



/* NIX APIs */

int rvu_nix_init(struct rvu *rvu);

void rvu_nix_freemem(struct rvu *rvu);

int rvu_get_nixlf_count(struct rvu *rvu);

int rvu_mbox_handler_NIX_LF_ALLOC(struct rvu *rvu,

int rvu_mbox_handler_nix_lf_alloc(struct rvu *rvu,

				  struct nix_lf_alloc_req *req,

				  struct nix_lf_alloc_rsp *rsp);

int rvu_mbox_handler_NIX_LF_FREE(struct rvu *rvu, struct msg_req *req,

int rvu_mbox_handler_nix_lf_free(struct rvu *rvu, struct msg_req *req,

				 struct msg_rsp *rsp);

int rvu_mbox_handler_NIX_AQ_ENQ(struct rvu *rvu,

int rvu_mbox_handler_nix_aq_enq(struct rvu *rvu,

				struct nix_aq_enq_req *req,

				struct nix_aq_enq_rsp *rsp);

int rvu_mbox_handler_NIX_HWCTX_DISABLE(struct rvu *rvu,

int rvu_mbox_handler_nix_hwctx_disable(struct rvu *rvu,

				       struct hwctx_disable_req *req,

				       struct msg_rsp *rsp);

int rvu_mbox_handler_NIX_TXSCH_ALLOC(struct rvu *rvu,

int rvu_mbox_handler_nix_txsch_alloc(struct rvu *rvu,

				     struct nix_txsch_alloc_req *req,

				     struct nix_txsch_alloc_rsp *rsp);

int rvu_mbox_handler_NIX_TXSCH_FREE(struct rvu *rvu,

int rvu_mbox_handler_nix_txsch_free(struct rvu *rvu,

				    struct nix_txsch_free_req *req,

				    struct msg_rsp *rsp);

int rvu_mbox_handler_NIX_TXSCHQ_CFG(struct rvu *rvu,

int rvu_mbox_handler_nix_txschq_cfg(struct rvu *rvu,

				    struct nix_txschq_config *req,

				    struct msg_rsp *rsp);

int rvu_mbox_handler_NIX_STATS_RST(struct rvu *rvu, struct msg_req *req,

int rvu_mbox_handler_nix_stats_rst(struct rvu *rvu, struct msg_req *req,

				   struct msg_rsp *rsp);

int rvu_mbox_handler_NIX_VTAG_CFG(struct rvu *rvu,

int rvu_mbox_handler_nix_vtag_cfg(struct rvu *rvu,

				  struct nix_vtag_config *req,

				  struct msg_rsp *rsp);

int rvu_mbox_handler_NIX_RSS_FLOWKEY_CFG(struct rvu *rvu,

int rvu_mbox_handler_nix_rss_flowkey_cfg(struct rvu *rvu,

					 struct nix_rss_flowkey_cfg *req,

					 struct msg_rsp *rsp);

int rvu_mbox_handler_NIX_SET_MAC_ADDR(struct rvu *rvu,

int rvu_mbox_handler_nix_set_mac_addr(struct rvu *rvu,

				      struct nix_set_mac_addr *req,

				      struct msg_rsp *rsp);

int rvu_mbox_handler_NIX_SET_RX_MODE(struct rvu *rvu, struct nix_rx_mode *req,

int rvu_mbox_handler_nix_set_rx_mode(struct rvu *rvu, struct nix_rx_mode *req,

				     struct msg_rsp *rsp);



/* NPC APIs */

drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

+15 −15
Original line number Diff line number Diff line
@@ -20,9 +20,9 @@ struct cgx_evq_entry { 
	struct cgx_link_event link_event;

};



#define M(_name, _id, _req_type, _rsp_type)				\

#define M(_name, _id, _fn_name, _req_type, _rsp_type)			\

static struct _req_type __maybe_unused					\

*otx2_mbox_alloc_msg_ ## _name(struct rvu *rvu, int devid)		\

*otx2_mbox_alloc_msg_ ## _fn_name(struct rvu *rvu, int devid)		\

{									\

	struct _req_type *req;						\

									\
@@ -177,7 +177,7 @@ static void cgx_notify_pfs(struct cgx_link_event *event, struct rvu *rvu) 
		}



		/* Send mbox message to PF */

		msg = otx2_mbox_alloc_msg_CGX_LINK_EVENT(rvu, pfid);

		msg = otx2_mbox_alloc_msg_cgx_link_event(rvu, pfid);

		if (!msg)

			continue;

		msg->link_info = *linfo;
@@ -303,21 +303,21 @@ int rvu_cgx_config_rxtx(struct rvu *rvu, u16 pcifunc, bool start) 
	return 0;

}



int rvu_mbox_handler_CGX_START_RXTX(struct rvu *rvu, struct msg_req *req,

int rvu_mbox_handler_cgx_start_rxtx(struct rvu *rvu, struct msg_req *req,

				    struct msg_rsp *rsp)

{

	rvu_cgx_config_rxtx(rvu, req->hdr.pcifunc, true);

	return 0;

}



int rvu_mbox_handler_CGX_STOP_RXTX(struct rvu *rvu, struct msg_req *req,

int rvu_mbox_handler_cgx_stop_rxtx(struct rvu *rvu, struct msg_req *req,

				   struct msg_rsp *rsp)

{

	rvu_cgx_config_rxtx(rvu, req->hdr.pcifunc, false);

	return 0;

}



int rvu_mbox_handler_CGX_STATS(struct rvu *rvu, struct msg_req *req,

int rvu_mbox_handler_cgx_stats(struct rvu *rvu, struct msg_req *req,

			       struct cgx_stats_rsp *rsp)

{

	int pf = rvu_get_pf(req->hdr.pcifunc);
@@ -354,7 +354,7 @@ int rvu_mbox_handler_CGX_STATS(struct rvu *rvu, struct msg_req *req, 
	return 0;

}



int rvu_mbox_handler_CGX_MAC_ADDR_SET(struct rvu *rvu,

int rvu_mbox_handler_cgx_mac_addr_set(struct rvu *rvu,

				      struct cgx_mac_addr_set_or_get *req,

				      struct cgx_mac_addr_set_or_get *rsp)

{
@@ -368,7 +368,7 @@ int rvu_mbox_handler_CGX_MAC_ADDR_SET(struct rvu *rvu, 
	return 0;

}



int rvu_mbox_handler_CGX_MAC_ADDR_GET(struct rvu *rvu,

int rvu_mbox_handler_cgx_mac_addr_get(struct rvu *rvu,

				      struct cgx_mac_addr_set_or_get *req,

				      struct cgx_mac_addr_set_or_get *rsp)

{
@@ -387,7 +387,7 @@ int rvu_mbox_handler_CGX_MAC_ADDR_GET(struct rvu *rvu, 
	return 0;

}



int rvu_mbox_handler_CGX_PROMISC_ENABLE(struct rvu *rvu, struct msg_req *req,

int rvu_mbox_handler_cgx_promisc_enable(struct rvu *rvu, struct msg_req *req,

					struct msg_rsp *rsp)

{

	u16 pcifunc = req->hdr.pcifunc;
@@ -407,7 +407,7 @@ int rvu_mbox_handler_CGX_PROMISC_ENABLE(struct rvu *rvu, struct msg_req *req, 
	return 0;

}



int rvu_mbox_handler_CGX_PROMISC_DISABLE(struct rvu *rvu, struct msg_req *req,

int rvu_mbox_handler_cgx_promisc_disable(struct rvu *rvu, struct msg_req *req,

					 struct msg_rsp *rsp)

{

	u16 pcifunc = req->hdr.pcifunc;
@@ -451,21 +451,21 @@ static int rvu_cgx_config_linkevents(struct rvu *rvu, u16 pcifunc, bool en) 
	return 0;

}



int rvu_mbox_handler_CGX_START_LINKEVENTS(struct rvu *rvu, struct msg_req *req,

int rvu_mbox_handler_cgx_start_linkevents(struct rvu *rvu, struct msg_req *req,

					  struct msg_rsp *rsp)

{

	rvu_cgx_config_linkevents(rvu, req->hdr.pcifunc, true);

	return 0;

}



int rvu_mbox_handler_CGX_STOP_LINKEVENTS(struct rvu *rvu, struct msg_req *req,

int rvu_mbox_handler_cgx_stop_linkevents(struct rvu *rvu, struct msg_req *req,

					 struct msg_rsp *rsp)

{

	rvu_cgx_config_linkevents(rvu, req->hdr.pcifunc, false);

	return 0;

}



int rvu_mbox_handler_CGX_GET_LINKINFO(struct rvu *rvu, struct msg_req *req,

int rvu_mbox_handler_cgx_get_linkinfo(struct rvu *rvu, struct msg_req *req,

				      struct cgx_link_info_msg *rsp)

{

	u8 cgx_id, lmac_id;
@@ -500,14 +500,14 @@ static int rvu_cgx_config_intlbk(struct rvu *rvu, u16 pcifunc, bool en) 
					  lmac_id, en);

}



int rvu_mbox_handler_CGX_INTLBK_ENABLE(struct rvu *rvu, struct msg_req *req,

int rvu_mbox_handler_cgx_intlbk_enable(struct rvu *rvu, struct msg_req *req,

				       struct msg_rsp *rsp)

{

	rvu_cgx_config_intlbk(rvu, req->hdr.pcifunc, true);

	return 0;

}



int rvu_mbox_handler_CGX_INTLBK_DISABLE(struct rvu *rvu, struct msg_req *req,

int rvu_mbox_handler_cgx_intlbk_disable(struct rvu *rvu, struct msg_req *req,

					struct msg_rsp *rsp)

{

	rvu_cgx_config_intlbk(rvu, req->hdr.pcifunc, false);