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Commit ea2ca36b authored by Aravind Gopalakrishnan's avatar Aravind Gopalakrishnan Committed by Ingo Molnar
Browse files

x86/mce/AMD: Document some functionality 



In an attempt to aid in understanding of what the threshold_block
structure holds, provide comments to describe the members here. Also,
trim comments around threshold_restart_bank() and update copyright info.

No functional change is introduced.

Signed-off-by: default avatarAravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
[ Shorten comments. ]
Signed-off-by: default avatarBorislav Petkov <bp@suse.de>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Tony Luck <tony.luck@intel.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1457021458-2522-6-git-send-email-Aravind.Gopalakrishnan@amd.com


Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent 2cd3b5f9

arch/x86/include/asm/amd_nb.h

+17 −9
Original line number Diff line number Diff line
@@ -27,15 +27,23 @@ struct amd_l3_cache { 
};



struct threshold_block {

	unsigned int		block;

	unsigned int		bank;

	unsigned int		cpu;

	u32			address;

	u16			interrupt_enable;

	bool			interrupt_capable;

	u16			threshold_limit;

	struct kobject		kobj;

	struct list_head	miscj;

	unsigned int	 block;			/* Number within bank */

	unsigned int	 bank;			/* MCA bank the block belongs to */

	unsigned int	 cpu;			/* CPU which controls MCA bank */

	u32		 address;		/* MSR address for the block */

	u16		 interrupt_enable;	/* Enable/Disable APIC interrupt */

	bool		 interrupt_capable;	/* Bank can generate an interrupt. */



	u16		 threshold_limit;	/*

						 * Value upon which threshold

						 * interrupt is generated.

						 */



	struct kobject	 kobj;			/* sysfs object */

	struct list_head miscj;			/*

						 * List of threshold blocks

						 * within a bank.

						 */

};



struct threshold_bank {

arch/x86/kernel/cpu/mcheck/mce_amd.c

+2 −5
Original line number Diff line number Diff line 
/*

 *  (c) 2005-2015 Advanced Micro Devices, Inc.

 *  (c) 2005-2016 Advanced Micro Devices, Inc.

 *  Your use of this code is subject to the terms and conditions of the

 *  GNU general public license version 2. See "COPYING" or

 *  http://www.gnu.org/licenses/gpl.html
@@ -201,10 +201,7 @@ static int lvt_off_valid(struct threshold_block *b, int apic, u32 lo, u32 hi) 
	return 1;

};



/*

 * Called via smp_call_function_single(), must be called with correct

 * cpu affinity.

 */

/* Reprogram MCx_MISC MSR behind this threshold bank. */

static void threshold_restart_bank(void *_tr)

{

	struct thresh_restart *tr = _tr;