Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit e9f1af39 authored by Ander Conselvan de Oliveira's avatar Ander Conselvan de Oliveira Committed by Daniel Vetter
Browse files

drm/i915: Don't store current shared DPLL in the new pipe_config 



Now that shared DPLLs configuration is staged, there's no need to track
the current ones in the new pipe_config since those are released before
making the new pipe_config effective.

Signed-off-by: default avatarAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent f3019a4d

drivers/gpu/drm/i915/intel_display.c

+0 −8
Original line number Diff line number Diff line
@@ -5533,14 +5533,6 @@ static int intel_crtc_compute_config(struct intel_crtc *crtc, 
	if (HAS_IPS(dev))

		hsw_compute_ips_config(crtc, pipe_config);



	/*

	 * XXX: PCH/WRPLL clock sharing is done in ->mode_set if ->compute_clock is not

	 * set, so make sure the old clock survives for now.

	 */

	if (dev_priv->display.crtc_compute_clock == NULL &&

            (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev) || HAS_DDI(dev)))

		pipe_config->shared_dpll = crtc->config.shared_dpll;



	if (pipe_config->has_pch_encoder)

		return ironlake_fdi_compute_config(crtc, pipe_config);