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Commit e9bc0765 authored by Neil Armstrong's avatar Neil Armstrong Committed by Kevin Hilman
Browse files

arm64: dts: meson-g12a: enable DVFS on G12A boards 

Enable DVFS for the U200, SEI520 and X96-Max Amlogic G12A based board
by setting the clock, OPP and supply for each CPU cores.

The CPU cluster power supply can achieve 0.73V to 1.01V using a PWM
output clocked at 800KHz with an inverse duty-cycle.

DVFS has been tested by running the arm64 cpuburn at [1] and cycling
between all the possible cpufreq translations and checking the final
frequency using the clock-measurer, script at [2].

[1] https://github.com/ssvb/cpuburn-arm/blob/master/cpuburn-a53.S
[2] https://gist.github.com/superna9999/d4de964dbc0f84b7d527e1df2ddea25f



Reviewed-by: default avatarMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: default avatarNeil Armstrong <narmstrong@baylibre.com>
Reviewed-by: default avatarKevin Hilman <khilman@baylibre.com>
Tested-by: default avatarKevin Hilman <khilman@baylibre.com>
Signed-off-by: default avatarKevin Hilman <khilman@baylibre.com>
parent b190056f

arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts

+55 −0
Original line number Diff line number Diff line
@@ -129,6 +129,25 @@ 
		enable-active-high;

	};



	vddcpu: regulator-vddcpu {

		/*

		 * SY8120B1ABC DC/DC Regulator.

		 */

		compatible = "pwm-regulator";



		regulator-name = "VDDCPU";

		regulator-min-microvolt = <721000>;

		regulator-max-microvolt = <1022000>;



		vin-supply = <&dc_in>;



		pwms = <&pwm_AO_cd 1 1250 0>;

		pwm-dutycycle-range = <100 0>;



		regulator-boot-on;

		regulator-always-on;

	};



	vddio_ao1v8: regulator-vddio_ao1v8 {

		compatible = "regulator-fixed";

		regulator-name = "VDDIO_AO1V8";
@@ -297,6 +316,34 @@ 
	status = "okay";

};



&cpu0 {

	cpu-supply = <&vddcpu>;

	operating-points-v2 = <&cpu_opp_table>;

	clocks = <&clkc CLKID_CPU_CLK>;

	clock-latency = <50000>;

};



&cpu1 {

	cpu-supply = <&vddcpu>;

	operating-points-v2 = <&cpu_opp_table>;

	clocks = <&clkc CLKID_CPU_CLK>;

	clock-latency = <50000>;

};



&cpu2 {

	cpu-supply = <&vddcpu>;

	operating-points-v2 = <&cpu_opp_table>;

	clocks = <&clkc CLKID_CPU_CLK>;

	clock-latency = <50000>;

};



&cpu3 {

	cpu-supply = <&vddcpu>;

	operating-points-v2 = <&cpu_opp_table>;

	clocks = <&clkc CLKID_CPU_CLK>;

	clock-latency = <50000>;

};



&cvbs_vdac_port {

	cvbs_vdac_out: endpoint {

		remote-endpoint = <&cvbs_connector_in>;
@@ -345,6 +392,14 @@ 
	pinctrl-names = "default";

};



&pwm_AO_cd {

	pinctrl-0 = <&pwm_ao_d_e_pins>;

	pinctrl-names = "default";

	clocks = <&xtal>;

	clock-names = "clkin1";

	status = "okay";

};



&pwm_ef {

	status = "okay";

	pinctrl-0 = <&pwm_e_pins>;

arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts

+54 −0
Original line number Diff line number Diff line
@@ -129,6 +129,24 @@ 
		regulator-always-on;

	};



	vddcpu: regulator-vddcpu {

		/*

		 * MP8756GD Regulator.

		 */

		compatible = "pwm-regulator";



		regulator-name = "VDDCPU";

		regulator-min-microvolt = <721000>;

		regulator-max-microvolt = <1022000>;



		vin-supply = <&main_12v>;



		pwms = <&pwm_AO_cd 1 1250 0>;

		pwm-dutycycle-range = <100 0>;



		regulator-boot-on;

		regulator-always-on;

	};

};



&cec_AO {
@@ -145,6 +163,34 @@ 
	hdmi-phandle = <&hdmi_tx>;

};



&cpu0 {

	cpu-supply = <&vddcpu>;

	operating-points-v2 = <&cpu_opp_table>;

	clocks = <&clkc CLKID_CPU_CLK>;

	clock-latency = <50000>;

};



&cpu1 {

	cpu-supply = <&vddcpu>;

	operating-points-v2 = <&cpu_opp_table>;

	clocks = <&clkc CLKID_CPU_CLK>;

	clock-latency = <50000>;

};



&cpu2 {

	cpu-supply = <&vddcpu>;

	operating-points-v2 = <&cpu_opp_table>;

	clocks = <&clkc CLKID_CPU_CLK>;

	clock-latency = <50000>;

};



&cpu3 {

	cpu-supply = <&vddcpu>;

	operating-points-v2 = <&cpu_opp_table>;

	clocks = <&clkc CLKID_CPU_CLK>;

	clock-latency = <50000>;

};



&cvbs_vdac_port {

	cvbs_vdac_out: endpoint {

		remote-endpoint = <&cvbs_connector_in>;
@@ -197,6 +243,14 @@ 
	pinctrl-names = "default";

};



&pwm_AO_cd {

	pinctrl-0 = <&pwm_ao_d_e_pins>;

	pinctrl-names = "default";

	clocks = <&xtal>;

	clock-names = "clkin1";

	status = "okay";

};



/* SD card */

&sd_emmc_b {

	status = "okay";

arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts

+52 −0
Original line number Diff line number Diff line
@@ -132,6 +132,22 @@ 
		regulator-always-on;

	};



	vddcpu: regulator-vddcpu {

		compatible = "pwm-regulator";



		regulator-name = "VDDCPU";

		regulator-min-microvolt = <721000>;

		regulator-max-microvolt = <1022000>;



		vin-supply = <&dc_in>;



		pwms = <&pwm_AO_cd 1 1250 0>;

		pwm-dutycycle-range = <100 0>;



		regulator-boot-on;

		regulator-always-on;

	};



	sound {

		compatible = "amlogic,axg-sound-card";

		model = "G12A-X96-MAX";
@@ -242,6 +258,34 @@ 
	status = "okay";

};



&cpu0 {

	cpu-supply = <&vddcpu>;

	operating-points-v2 = <&cpu_opp_table>;

	clocks = <&clkc CLKID_CPU_CLK>;

	clock-latency = <50000>;

};



&cpu1 {

	cpu-supply = <&vddcpu>;

	operating-points-v2 = <&cpu_opp_table>;

	clocks = <&clkc CLKID_CPU_CLK>;

	clock-latency = <50000>;

};



&cpu2 {

	cpu-supply = <&vddcpu>;

	operating-points-v2 = <&cpu_opp_table>;

	clocks = <&clkc CLKID_CPU_CLK>;

	clock-latency = <50000>;

};



&cpu3 {

	cpu-supply = <&vddcpu>;

	operating-points-v2 = <&cpu_opp_table>;

	clocks = <&clkc CLKID_CPU_CLK>;

	clock-latency = <50000>;

};



&cvbs_vdac_port {

	cvbs_vdac_out: endpoint {

		remote-endpoint = <&cvbs_connector_in>;
@@ -279,6 +323,14 @@ 
	pinctrl-names = "default";

};



&pwm_AO_cd {

	pinctrl-0 = <&pwm_ao_d_e_pins>;

	pinctrl-names = "default";

	clocks = <&xtal>;

	clock-names = "clkin1";

	status = "okay";

};



&ext_mdio {

	external_phy: ethernet-phy@0 {

		/* Realtek RTL8211F (0x001cc916) */