Loading .mailmap +5 −0 Original line number Diff line number Diff line Loading @@ -64,6 +64,9 @@ Dengcheng Zhu <dzhu@wavecomp.com> <dengcheng.zhu@imgtec.com> Dengcheng Zhu <dzhu@wavecomp.com> <dczhu@mips.com> Dengcheng Zhu <dzhu@wavecomp.com> <dengcheng.zhu@gmail.com> Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Dmitry Safonov <0x7f454c46@gmail.com> <dsafonov@virtuozzo.com> Dmitry Safonov <0x7f454c46@gmail.com> <d.safonov@partner.samsung.com> Dmitry Safonov <0x7f454c46@gmail.com> <dima@arista.com> Domen Puncer <domen@coderock.org> Douglas Gilbert <dougg@torque.net> Ed L. Cashin <ecashin@coraid.com> Loading Loading @@ -160,6 +163,8 @@ Matt Ranostay <mranostay@gmail.com> Matthew Ranostay <mranostay@embeddedalley.co Matt Ranostay <mranostay@gmail.com> <matt.ranostay@intel.com> Matt Ranostay <matt.ranostay@konsulko.com> <matt@ranostay.consulting> Matt Redfearn <matt.redfearn@mips.com> <matt.redfearn@imgtec.com> Maxime Ripard <mripard@kernel.org> <maxime.ripard@bootlin.com> Maxime Ripard <mripard@kernel.org> <maxime.ripard@free-electrons.com> Mayuresh Janorkar <mayur@ti.com> Michael Buesch <m@bues.ch> Michel Dänzer <michel@tungstengraphics.com> Loading Documentation/devicetree/bindings/interrupt-controller/snps,archs-idu-intc.txt +20 −10 Original line number Diff line number Diff line * ARC-HS Interrupt Distribution Unit This optional 2nd level interrupt controller can be used in SMP configurations for dynamic IRQ routing, load balancing of common/external IRQs towards core intc. This optional 2nd level interrupt controller can be used in SMP configurations for dynamic IRQ routing, load balancing of common/external IRQs towards core intc. Properties: - compatible: "snps,archs-idu-intc" - interrupt-controller: This is an interrupt controller. - #interrupt-cells: Must be <1>. Value of the cell specifies the "common" IRQ from peripheral to IDU. Number N of the particular interrupt line of IDU corresponds to the line N+24 of the core interrupt controller. intc accessed via the special ARC AUX register interface, hence "reg" property is not specified. - #interrupt-cells: Must be <1> or <2>. Value of the first cell specifies the "common" IRQ from peripheral to IDU. Number N of the particular interrupt line of IDU corresponds to the line N+24 of the core interrupt controller. The (optional) second cell specifies any of the following flags: - bits[3:0] trigger type and level flags 1 = low-to-high edge triggered 2 = NOT SUPPORTED (high-to-low edge triggered) 4 = active high level-sensitive <<< DEFAULT 8 = NOT SUPPORTED (active low level-sensitive) When no second cell is specified, the interrupt is assumed to be level sensitive. The interrupt controller is accessed via the special ARC AUX register interface, hence "reg" property is not specified. Example: core_intc: core-interrupt-controller { Loading MAINTAINERS +8 −12 Original line number Diff line number Diff line Loading @@ -683,7 +683,7 @@ S: Maintained F: drivers/crypto/sunxi-ss/ ALLWINNER VPU DRIVER M: Maxime Ripard <maxime.ripard@bootlin.com> M: Maxime Ripard <mripard@kernel.org> M: Paul Kocialkowski <paul.kocialkowski@bootlin.com> L: linux-media@vger.kernel.org S: Maintained Loading Loading @@ -1408,7 +1408,7 @@ S: Maintained F: drivers/clk/sunxi/ ARM/Allwinner sunXi SoC support M: Maxime Ripard <maxime.ripard@bootlin.com> M: Maxime Ripard <mripard@kernel.org> M: Chen-Yu Tsai <wens@csie.org> L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) S: Maintained Loading Loading @@ -3577,7 +3577,7 @@ F: Documentation/filesystems/caching/cachefiles.txt F: fs/cachefiles/ CADENCE MIPI-CSI2 BRIDGES M: Maxime Ripard <maxime.ripard@bootlin.com> M: Maxime Ripard <mripard@kernel.org> L: linux-media@vger.kernel.org S: Maintained F: Documentation/devicetree/bindings/media/cdns,*.txt Loading Loading @@ -5295,7 +5295,7 @@ F: include/linux/vga* DRM DRIVERS AND MISC GPU PATCHES M: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> M: Maxime Ripard <maxime.ripard@bootlin.com> M: Maxime Ripard <mripard@kernel.org> M: Sean Paul <sean@poorly.run> W: https://01.org/linuxgraphics/gfx-docs/maintainer-tools/drm-misc.html S: Maintained Loading @@ -5308,7 +5308,7 @@ F: include/uapi/drm/drm* F: include/linux/vga* DRM DRIVERS FOR ALLWINNER A10 M: Maxime Ripard <maxime.ripard@bootlin.com> M: Maxime Ripard <mripard@kernel.org> L: dri-devel@lists.freedesktop.org S: Supported F: drivers/gpu/drm/sun4i/ Loading Loading @@ -7513,7 +7513,7 @@ I2C MV64XXX MARVELL AND ALLWINNER DRIVER M: Gregory CLEMENT <gregory.clement@bootlin.com> L: linux-i2c@vger.kernel.org S: Maintained F: Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt F: Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml F: drivers/i2c/busses/i2c-mv64xxx.c I2C OVER PARALLEL PORT Loading Loading @@ -8454,11 +8454,6 @@ S: Maintained F: fs/io_uring.c F: include/uapi/linux/io_uring.h IP MASQUERADING M: Juanjo Ciarlante <jjciarla@raiz.uncu.edu.ar> S: Maintained F: net/ipv4/netfilter/ipt_MASQUERADE.c IPMI SUBSYSTEM M: Corey Minyard <minyard@acm.org> L: openipmi-developer@lists.sourceforge.net (moderated for non-subscribers) Loading Loading @@ -11086,7 +11081,7 @@ NET_FAILOVER MODULE M: Sridhar Samudrala <sridhar.samudrala@intel.com> L: netdev@vger.kernel.org S: Supported F: driver/net/net_failover.c F: drivers/net/net_failover.c F: include/net/net_failover.h F: Documentation/networking/net_failover.rst Loading Loading @@ -14478,6 +14473,7 @@ F: drivers/net/phy/phylink.c F: drivers/net/phy/sfp* F: include/linux/phylink.h F: include/linux/sfp.h K: phylink SGI GRU DRIVER M: Dimitri Sivanich <sivanich@sgi.com> Loading arch/arc/boot/dts/Makefile +3 −0 Original line number Diff line number Diff line Loading @@ -12,3 +12,6 @@ dtb-y := $(builtindtb-y).dtb # for CONFIG_OF_ALL_DTBS test dtstree := $(srctree)/$(src) dtb- := $(patsubst $(dtstree)/%.dts,%.dtb, $(wildcard $(dtstree)/*.dts)) # board-specific dtc flags DTC_FLAGS_hsdk += --pad 20 arch/arc/include/asm/entry-arcv2.h +1 −1 Original line number Diff line number Diff line Loading @@ -256,7 +256,7 @@ .macro FAKE_RET_FROM_EXCPN lr r9, [status32] bic r9, r9, (STATUS_U_MASK|STATUS_DE_MASK|STATUS_AE_MASK) bic r9, r9, STATUS_AE_MASK or r9, r9, STATUS_IE_MASK kflag r9 .endm Loading Loading
.mailmap +5 −0 Original line number Diff line number Diff line Loading @@ -64,6 +64,9 @@ Dengcheng Zhu <dzhu@wavecomp.com> <dengcheng.zhu@imgtec.com> Dengcheng Zhu <dzhu@wavecomp.com> <dczhu@mips.com> Dengcheng Zhu <dzhu@wavecomp.com> <dengcheng.zhu@gmail.com> Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Dmitry Safonov <0x7f454c46@gmail.com> <dsafonov@virtuozzo.com> Dmitry Safonov <0x7f454c46@gmail.com> <d.safonov@partner.samsung.com> Dmitry Safonov <0x7f454c46@gmail.com> <dima@arista.com> Domen Puncer <domen@coderock.org> Douglas Gilbert <dougg@torque.net> Ed L. Cashin <ecashin@coraid.com> Loading Loading @@ -160,6 +163,8 @@ Matt Ranostay <mranostay@gmail.com> Matthew Ranostay <mranostay@embeddedalley.co Matt Ranostay <mranostay@gmail.com> <matt.ranostay@intel.com> Matt Ranostay <matt.ranostay@konsulko.com> <matt@ranostay.consulting> Matt Redfearn <matt.redfearn@mips.com> <matt.redfearn@imgtec.com> Maxime Ripard <mripard@kernel.org> <maxime.ripard@bootlin.com> Maxime Ripard <mripard@kernel.org> <maxime.ripard@free-electrons.com> Mayuresh Janorkar <mayur@ti.com> Michael Buesch <m@bues.ch> Michel Dänzer <michel@tungstengraphics.com> Loading
Documentation/devicetree/bindings/interrupt-controller/snps,archs-idu-intc.txt +20 −10 Original line number Diff line number Diff line * ARC-HS Interrupt Distribution Unit This optional 2nd level interrupt controller can be used in SMP configurations for dynamic IRQ routing, load balancing of common/external IRQs towards core intc. This optional 2nd level interrupt controller can be used in SMP configurations for dynamic IRQ routing, load balancing of common/external IRQs towards core intc. Properties: - compatible: "snps,archs-idu-intc" - interrupt-controller: This is an interrupt controller. - #interrupt-cells: Must be <1>. Value of the cell specifies the "common" IRQ from peripheral to IDU. Number N of the particular interrupt line of IDU corresponds to the line N+24 of the core interrupt controller. intc accessed via the special ARC AUX register interface, hence "reg" property is not specified. - #interrupt-cells: Must be <1> or <2>. Value of the first cell specifies the "common" IRQ from peripheral to IDU. Number N of the particular interrupt line of IDU corresponds to the line N+24 of the core interrupt controller. The (optional) second cell specifies any of the following flags: - bits[3:0] trigger type and level flags 1 = low-to-high edge triggered 2 = NOT SUPPORTED (high-to-low edge triggered) 4 = active high level-sensitive <<< DEFAULT 8 = NOT SUPPORTED (active low level-sensitive) When no second cell is specified, the interrupt is assumed to be level sensitive. The interrupt controller is accessed via the special ARC AUX register interface, hence "reg" property is not specified. Example: core_intc: core-interrupt-controller { Loading
MAINTAINERS +8 −12 Original line number Diff line number Diff line Loading @@ -683,7 +683,7 @@ S: Maintained F: drivers/crypto/sunxi-ss/ ALLWINNER VPU DRIVER M: Maxime Ripard <maxime.ripard@bootlin.com> M: Maxime Ripard <mripard@kernel.org> M: Paul Kocialkowski <paul.kocialkowski@bootlin.com> L: linux-media@vger.kernel.org S: Maintained Loading Loading @@ -1408,7 +1408,7 @@ S: Maintained F: drivers/clk/sunxi/ ARM/Allwinner sunXi SoC support M: Maxime Ripard <maxime.ripard@bootlin.com> M: Maxime Ripard <mripard@kernel.org> M: Chen-Yu Tsai <wens@csie.org> L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) S: Maintained Loading Loading @@ -3577,7 +3577,7 @@ F: Documentation/filesystems/caching/cachefiles.txt F: fs/cachefiles/ CADENCE MIPI-CSI2 BRIDGES M: Maxime Ripard <maxime.ripard@bootlin.com> M: Maxime Ripard <mripard@kernel.org> L: linux-media@vger.kernel.org S: Maintained F: Documentation/devicetree/bindings/media/cdns,*.txt Loading Loading @@ -5295,7 +5295,7 @@ F: include/linux/vga* DRM DRIVERS AND MISC GPU PATCHES M: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> M: Maxime Ripard <maxime.ripard@bootlin.com> M: Maxime Ripard <mripard@kernel.org> M: Sean Paul <sean@poorly.run> W: https://01.org/linuxgraphics/gfx-docs/maintainer-tools/drm-misc.html S: Maintained Loading @@ -5308,7 +5308,7 @@ F: include/uapi/drm/drm* F: include/linux/vga* DRM DRIVERS FOR ALLWINNER A10 M: Maxime Ripard <maxime.ripard@bootlin.com> M: Maxime Ripard <mripard@kernel.org> L: dri-devel@lists.freedesktop.org S: Supported F: drivers/gpu/drm/sun4i/ Loading Loading @@ -7513,7 +7513,7 @@ I2C MV64XXX MARVELL AND ALLWINNER DRIVER M: Gregory CLEMENT <gregory.clement@bootlin.com> L: linux-i2c@vger.kernel.org S: Maintained F: Documentation/devicetree/bindings/i2c/i2c-mv64xxx.txt F: Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml F: drivers/i2c/busses/i2c-mv64xxx.c I2C OVER PARALLEL PORT Loading Loading @@ -8454,11 +8454,6 @@ S: Maintained F: fs/io_uring.c F: include/uapi/linux/io_uring.h IP MASQUERADING M: Juanjo Ciarlante <jjciarla@raiz.uncu.edu.ar> S: Maintained F: net/ipv4/netfilter/ipt_MASQUERADE.c IPMI SUBSYSTEM M: Corey Minyard <minyard@acm.org> L: openipmi-developer@lists.sourceforge.net (moderated for non-subscribers) Loading Loading @@ -11086,7 +11081,7 @@ NET_FAILOVER MODULE M: Sridhar Samudrala <sridhar.samudrala@intel.com> L: netdev@vger.kernel.org S: Supported F: driver/net/net_failover.c F: drivers/net/net_failover.c F: include/net/net_failover.h F: Documentation/networking/net_failover.rst Loading Loading @@ -14478,6 +14473,7 @@ F: drivers/net/phy/phylink.c F: drivers/net/phy/sfp* F: include/linux/phylink.h F: include/linux/sfp.h K: phylink SGI GRU DRIVER M: Dimitri Sivanich <sivanich@sgi.com> Loading
arch/arc/boot/dts/Makefile +3 −0 Original line number Diff line number Diff line Loading @@ -12,3 +12,6 @@ dtb-y := $(builtindtb-y).dtb # for CONFIG_OF_ALL_DTBS test dtstree := $(srctree)/$(src) dtb- := $(patsubst $(dtstree)/%.dts,%.dtb, $(wildcard $(dtstree)/*.dts)) # board-specific dtc flags DTC_FLAGS_hsdk += --pad 20
arch/arc/include/asm/entry-arcv2.h +1 −1 Original line number Diff line number Diff line Loading @@ -256,7 +256,7 @@ .macro FAKE_RET_FROM_EXCPN lr r9, [status32] bic r9, r9, (STATUS_U_MASK|STATUS_DE_MASK|STATUS_AE_MASK) bic r9, r9, STATUS_AE_MASK or r9, r9, STATUS_IE_MASK kflag r9 .endm Loading