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Commit e97f8bb8 authored by Borislav Petkov's avatar Borislav Petkov
Browse files

amd64_edac: make DRAM regions output more human-readable 



Do not shift the TOP_MEM and TOP_MEM2 values by 23 but rather save the
whole 64-bit value read from the MSR. Although the TOP_MEM/TOP_MEM2 bits
are only a subset of the 64bit register, the values are correct since
the remaining bits are Read-As-Zero and no shifting is needed.

Also, cleanup DRAM base/limit debug output.

Signed-off-by: default avatarBorislav Petkov <borislav.petkov@amd.com>
parent 72381bd5

drivers/edac/amd64_edac.c

+9 −12
Original line number Original line Diff line number Diff line
@@ -2399,16 +2399,14 @@ static void amd64_read_mc_registers(struct amd64_pvt *pvt) 
	 * Retrieve TOP_MEM and TOP_MEM2; no masking off of reserved bits since

	 * Retrieve TOP_MEM and TOP_MEM2; no masking off of reserved bits since

	 * those are Read-As-Zero

	 * those are Read-As-Zero

	 */

	 */

	rdmsrl(MSR_K8_TOP_MEM1, msr_val);

	rdmsrl(MSR_K8_TOP_MEM1, pvt->top_mem);

	pvt->top_mem = msr_val >> 23;

	debugf0("  TOP_MEM:  0x%016llx\n", pvt->top_mem);

	debugf0("  TOP_MEM=0x%08llx\n", pvt->top_mem);





	/* check first whether TOP_MEM2 is enabled */

	/* check first whether TOP_MEM2 is enabled */

	rdmsrl(MSR_K8_SYSCFG, msr_val);

	rdmsrl(MSR_K8_SYSCFG, msr_val);

	if (msr_val & (1U << 21)) {

	if (msr_val & (1U << 21)) {

		rdmsrl(MSR_K8_TOP_MEM2, msr_val);

		rdmsrl(MSR_K8_TOP_MEM2, pvt->top_mem2);

		pvt->top_mem2 = msr_val >> 23;

		debugf0("  TOP_MEM2: 0x%016llx\n", pvt->top_mem2);

		debugf0("  TOP_MEM2=0x%08llx\n", pvt->top_mem2);

	} else

	} else

		debugf0("  TOP_MEM2 disabled.\n");

		debugf0("  TOP_MEM2 disabled.\n");
@@ -2434,13 +2432,12 @@ static void amd64_read_mc_registers(struct amd64_pvt *pvt) 
		 * debug output block away.

		 * debug output block away.

		 */

		 */

		if (pvt->dram_rw_en[dram] != 0) {

		if (pvt->dram_rw_en[dram] != 0) {

			debugf1("  DRAM_BASE[%d]: 0x%8.08x-%8.08x "

			debugf1("  DRAM-BASE[%d]: 0x%016llx "

				"DRAM_LIMIT:  0x%8.08x-%8.08x\n",

				"DRAM-LIMIT:  0x%016llx\n",

				dram,

				dram,

				(u32)(pvt->dram_base[dram] >> 32),

				pvt->dram_base[dram],

				(u32)(pvt->dram_base[dram] & 0xFFFFFFFF),

				pvt->dram_limit[dram]);

				(u32)(pvt->dram_limit[dram] >> 32),



				(u32)(pvt->dram_limit[dram] & 0xFFFFFFFF));

			debugf1("        IntlvEn=%s %s %s "

			debugf1("        IntlvEn=%s %s %s "

				"IntlvSel=%d DstNode=%d\n",

				"IntlvSel=%d DstNode=%d\n",

				pvt->dram_IntlvEn[dram] ?

				pvt->dram_IntlvEn[dram] ?