Loading msm/dsi/dsi_panel.c +27 −10 Original line number Diff line number Diff line Loading @@ -2488,7 +2488,6 @@ static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode, u32 len, i; int rc = 0; struct dsi_display_mode_priv_info *priv_info; struct dsi_mode_info *timing = NULL; if (!mode || !mode->priv_info) return -EINVAL; Loading @@ -2511,11 +2510,17 @@ static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode, priv_info->phy_timing_len = len; } timing = &mode->timing; mode->pixel_clk_khz = (DSI_H_TOTAL(&mode->timing) * if (mode->panel_mode == DSI_OP_VIDEO_MODE) { /* * For command mode we update the pclk as part of * function dsi_panel_calc_dsi_transfer_time( ) * as we set it based on dsi clock or mdp transfer time. */ mode->pixel_clk_khz = (DSI_H_TOTAL_DSC(&mode->timing) * DSI_V_TOTAL(&mode->timing) * mode->timing.refresh_rate) / 1000; } return rc; } Loading Loading @@ -3511,15 +3516,18 @@ void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config, struct dsi_display_mode *mode, u32 frame_threshold_us) { u32 frame_time_us,nslices; u64 min_bitclk, total_active_pixels, bits_per_line; u64 min_bitclk_hz, total_active_pixels, bits_per_line, pclk_rate_hz; struct msm_display_dsc_info *dsc = mode->timing.dsc; struct dsi_mode_info *timing = &mode->timing; struct dsi_display_mode *display_mode; /* Packet overlead in bits,2 bytes header + 2 bytes checksum * + 1 byte dcs data command. */ const u32 packet_overhead = 56; display_mode = container_of(timing, struct dsi_display_mode, timing); frame_time_us = mult_frac(1000, 1000, (timing->refresh_rate)); if (timing->dsc_enabled) { Loading @@ -3531,22 +3539,22 @@ void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config, packet_overhead) * nslices; bits_per_line = bits_per_line / (config->num_data_lanes); min_bitclk = (bits_per_line * timing->v_active * min_bitclk_hz = (bits_per_line * timing->v_active * timing->refresh_rate); } else { total_active_pixels = ((DSI_H_ACTIVE_DSC(timing) * timing->v_active)); /* calculate the actual bitclk needed to transfer the frame */ min_bitclk = (total_active_pixels * (timing->refresh_rate) * min_bitclk_hz = (total_active_pixels * (timing->refresh_rate) * (config->bpp)) / (config->num_data_lanes); } timing->min_dsi_clk_hz = min_bitclk; timing->min_dsi_clk_hz = min_bitclk_hz; if (timing->clk_rate_hz) { /* adjust the transfer time proportionately for bit clk*/ timing->dsi_transfer_time_us = mult_frac(frame_time_us, min_bitclk, timing->clk_rate_hz); min_bitclk_hz, timing->clk_rate_hz); } else if (mode->priv_info->mdp_transfer_time_us) { timing->dsi_transfer_time_us = mode->priv_info->mdp_transfer_time_us; Loading @@ -3554,6 +3562,15 @@ void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config, timing->dsi_transfer_time_us = frame_time_us - frame_threshold_us; } /* Calculate pclk_khz to update modeinfo */ pclk_rate_hz = mult_frac(min_bitclk_hz, frame_time_us, timing->dsi_transfer_time_us); display_mode->pixel_clk_khz = mult_frac(pclk_rate_hz, config->num_data_lanes, config->bpp); do_div(display_mode->pixel_clk_khz, 1000); } Loading Loading
msm/dsi/dsi_panel.c +27 −10 Original line number Diff line number Diff line Loading @@ -2488,7 +2488,6 @@ static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode, u32 len, i; int rc = 0; struct dsi_display_mode_priv_info *priv_info; struct dsi_mode_info *timing = NULL; if (!mode || !mode->priv_info) return -EINVAL; Loading @@ -2511,11 +2510,17 @@ static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode, priv_info->phy_timing_len = len; } timing = &mode->timing; mode->pixel_clk_khz = (DSI_H_TOTAL(&mode->timing) * if (mode->panel_mode == DSI_OP_VIDEO_MODE) { /* * For command mode we update the pclk as part of * function dsi_panel_calc_dsi_transfer_time( ) * as we set it based on dsi clock or mdp transfer time. */ mode->pixel_clk_khz = (DSI_H_TOTAL_DSC(&mode->timing) * DSI_V_TOTAL(&mode->timing) * mode->timing.refresh_rate) / 1000; } return rc; } Loading Loading @@ -3511,15 +3516,18 @@ void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config, struct dsi_display_mode *mode, u32 frame_threshold_us) { u32 frame_time_us,nslices; u64 min_bitclk, total_active_pixels, bits_per_line; u64 min_bitclk_hz, total_active_pixels, bits_per_line, pclk_rate_hz; struct msm_display_dsc_info *dsc = mode->timing.dsc; struct dsi_mode_info *timing = &mode->timing; struct dsi_display_mode *display_mode; /* Packet overlead in bits,2 bytes header + 2 bytes checksum * + 1 byte dcs data command. */ const u32 packet_overhead = 56; display_mode = container_of(timing, struct dsi_display_mode, timing); frame_time_us = mult_frac(1000, 1000, (timing->refresh_rate)); if (timing->dsc_enabled) { Loading @@ -3531,22 +3539,22 @@ void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config, packet_overhead) * nslices; bits_per_line = bits_per_line / (config->num_data_lanes); min_bitclk = (bits_per_line * timing->v_active * min_bitclk_hz = (bits_per_line * timing->v_active * timing->refresh_rate); } else { total_active_pixels = ((DSI_H_ACTIVE_DSC(timing) * timing->v_active)); /* calculate the actual bitclk needed to transfer the frame */ min_bitclk = (total_active_pixels * (timing->refresh_rate) * min_bitclk_hz = (total_active_pixels * (timing->refresh_rate) * (config->bpp)) / (config->num_data_lanes); } timing->min_dsi_clk_hz = min_bitclk; timing->min_dsi_clk_hz = min_bitclk_hz; if (timing->clk_rate_hz) { /* adjust the transfer time proportionately for bit clk*/ timing->dsi_transfer_time_us = mult_frac(frame_time_us, min_bitclk, timing->clk_rate_hz); min_bitclk_hz, timing->clk_rate_hz); } else if (mode->priv_info->mdp_transfer_time_us) { timing->dsi_transfer_time_us = mode->priv_info->mdp_transfer_time_us; Loading @@ -3554,6 +3562,15 @@ void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config, timing->dsi_transfer_time_us = frame_time_us - frame_threshold_us; } /* Calculate pclk_khz to update modeinfo */ pclk_rate_hz = mult_frac(min_bitclk_hz, frame_time_us, timing->dsi_transfer_time_us); display_mode->pixel_clk_khz = mult_frac(pclk_rate_hz, config->num_data_lanes, config->bpp); do_div(display_mode->pixel_clk_khz, 1000); } Loading