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Commit e8e39a20 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'imx-dt64-5.4' of...

Merge tag 'imx-dt64-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt

i.MX arm64 device tree update for 5.4:
 - New board support: i.MX8MQ Nitrogen8m, Hummingboard Pulse,
   PICO-PI-IMX8M, i.MX8QXP AI_ML, and LS1046A FRWY board.
 - Add gpio-ranges for GPIO devices on i.MX8MQ and i.MX8MM.
 - Update OPP table according to latest data sheet and add opp-suspend
   to OPP table for i.MX8MQ and i.MX8MM.
 - Add IDEL states for i.MX8MM SoC.
 - Correct I2C clock divider for Layerscape SoCs.
 - Add series alias and LPUART baud clock for i.MX8QXP SoC.
 - Add MIPI D-PHY device for i.MX8MQ and enable it on imx8mq-librem5
   board.
 - Enable USB1 and Type-C support for i.MX8MM EVK board.
 - Add Thermal Monitor Unit support for LS1028A SoC.
 - Misc small update and correction on Layerscape and i.MX8 support.

* tag 'imx-dt64-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (41 commits)
  arm64: dts: imx8mq: Add mux controller to iomuxc_gpr
  arm64: dts: fsl: add support for Hummingboard Pulse
  arm64: dts: ls1088a: update gpio compatible
  arm64: dts: imx: Add i.mx8mq nitrogen8m basic dts support
  arm64: dts: ls1088a-qds: Add the spi-flash nodes under the DSPI controller
  arm64: dts: ls1088a: Add the DSPI controller node
  arm64: dts: imx8mm: Enable cpu-idle driver
  arm64: dts: ls1028a: Add esdhc node in dts
  arm64: dts: ls1028a: Add properties node for Display output pixel clock
  arm64: dts: lx2160a: Fix incorrect I2C clock divider
  arm64: dts: ls1028a: Fix incorrect I2C clock divider
  arm64: dts: ls1012a: Fix incorrect I2C clock divider
  arm64: dts: ls1088a: Fix incorrect I2C clock divider
  arm64: dts: ls1028a: fix gpio nodes
  arm64: dts: ls1028a: Add Thermal Monitor Unit node
  arm64: dts: imx8mq-evk: Unbypass audio_pll1
  arm64: dts: imx8mm: Add opp-suspend property to OPP table
  arm64: dts: imx8mq: Add opp-suspend property to OPP table
  arm64: dts: ls1088a: Revise gpio registers to little-endian
  arm64: dts: add the console node for DPAA2 platforms
  ...

Link: https://lore.kernel.org/r/20190825153237.28829-6-shawnguo@kernel.org


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents a0a4c25f 21570180
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+5 −0
Original line number Diff line number Diff line
@@ -8,6 +8,7 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-rdb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-rdb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-frwy.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-qds.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1046a-rdb.dtb
dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1088a-qds.dtb
@@ -23,7 +24,11 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-lx2160a-rdb.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mm-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mn-ddr4-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mq-evk.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mq-hummingboard-pulse.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mq-librem5-devkit.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mq-nitrogen.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mq-pico-pi.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mq-zii-ultra-rmb3.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8mq-zii-ultra-zest.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8qxp-ai_ml.dtb
dtb-$(CONFIG_ARCH_MXC) += imx8qxp-mek.dtb
+2 −2
Original line number Diff line number Diff line
@@ -323,7 +323,7 @@
			#size-cells = <0>;
			reg = <0x0 0x2180000 0x0 0x10000>;
			interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&clockgen 4 0>;
			clocks = <&clockgen 4 3>;
			status = "disabled";
		};

@@ -333,7 +333,7 @@
			#size-cells = <0>;
			reg = <0x0 0x2190000 0x0 0x10000>;
			interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&clockgen 4 0>;
			clocks = <&clockgen 4 3>;
			status = "disabled";
		};

+8 −0
Original line number Diff line number Diff line
@@ -95,6 +95,14 @@
	status = "okay";
};

&esdhc {
	status = "okay";
};

&esdhc1 {
	status = "okay";
};

&i2c0 {
	status = "okay";

+13 −0
Original line number Diff line number Diff line
@@ -83,6 +83,19 @@
	};
};

&esdhc {
	sd-uhs-sdr104;
	sd-uhs-sdr50;
	sd-uhs-sdr25;
	sd-uhs-sdr12;
	status = "okay";
};

&esdhc1 {
	mmc-hs200-1_8v;
	status = "okay";
};

&i2c0 {
	status = "okay";

+137 −14
Original line number Diff line number Diff line
@@ -29,6 +29,7 @@
			clocks = <&clockgen 1 0>;
			next-level-cache = <&l2>;
			cpu-idle-states = <&CPU_PW20>;
			#cooling-cells = <2>;
		};

		cpu1: cpu@1 {
@@ -39,6 +40,7 @@
			clocks = <&clockgen 1 0>;
			next-level-cache = <&l2>;
			cpu-idle-states = <&CPU_PW20>;
			#cooling-cells = <2>;
		};

		l2: l2-cache {
@@ -70,11 +72,18 @@
		clock-output-names = "sysclk";
	};

	dpclk: clock-dp {
	osc_27m: clock-osc-27m {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <27000000>;
		clock-output-names= "dpclk";
		clock-output-names = "phy_27m";
	};

	dpclk: clock-controller@f1f0000 {
		compatible = "fsl,ls1028a-plldig";
		reg = <0x0 0xf1f0000 0x0 0xffff>;
		#clock-cells = <1>;
		clocks = <&osc_27m>;
	};

	aclk: clock-axi {
@@ -171,7 +180,7 @@
			#size-cells = <0>;
			reg = <0x0 0x2000000 0x0 0x10000>;
			interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&clockgen 4 1>;
			clocks = <&clockgen 4 3>;
			status = "disabled";
		};

@@ -181,7 +190,7 @@
			#size-cells = <0>;
			reg = <0x0 0x2010000 0x0 0x10000>;
			interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&clockgen 4 1>;
			clocks = <&clockgen 4 3>;
			status = "disabled";
		};

@@ -191,7 +200,7 @@
			#size-cells = <0>;
			reg = <0x0 0x2020000 0x0 0x10000>;
			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&clockgen 4 1>;
			clocks = <&clockgen 4 3>;
			status = "disabled";
		};

@@ -201,7 +210,7 @@
			#size-cells = <0>;
			reg = <0x0 0x2030000 0x0 0x10000>;
			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&clockgen 4 1>;
			clocks = <&clockgen 4 3>;
			status = "disabled";
		};

@@ -211,7 +220,7 @@
			#size-cells = <0>;
			reg = <0x0 0x2040000 0x0 0x10000>;
			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&clockgen 4 1>;
			clocks = <&clockgen 4 3>;
			status = "disabled";
		};

@@ -221,7 +230,7 @@
			#size-cells = <0>;
			reg = <0x0 0x2050000 0x0 0x10000>;
			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&clockgen 4 1>;
			clocks = <&clockgen 4 3>;
			status = "disabled";
		};

@@ -231,7 +240,7 @@
			#size-cells = <0>;
			reg = <0x0 0x2060000 0x0 0x10000>;
			interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&clockgen 4 1>;
			clocks = <&clockgen 4 3>;
			status = "disabled";
		};

@@ -241,7 +250,34 @@
			#size-cells = <0>;
			reg = <0x0 0x2070000 0x0 0x10000>;
			interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&clockgen 4 1>;
			clocks = <&clockgen 4 3>;
			status = "disabled";
		};

		esdhc: mmc@2140000 {
			compatible = "fsl,ls1028a-esdhc", "fsl,esdhc";
			reg = <0x0 0x2140000 0x0 0x10000>;
			interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
			clock-frequency = <0>; /* fixed up by bootloader */
			clocks = <&clockgen 2 1>;
			voltage-ranges = <1800 1800 3300 3300>;
			sdhci,auto-cmd12;
			little-endian;
			bus-width = <4>;
			status = "disabled";
		};

		esdhc1: mmc@2150000 {
			compatible = "fsl,ls1028a-esdhc", "fsl,esdhc";
			reg = <0x0 0x2150000 0x0 0x10000>;
			interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
			clock-frequency = <0>; /* fixed up by bootloader */
			clocks = <&clockgen 2 1>;
			voltage-ranges = <1800 1800 3300 3300>;
			sdhci,auto-cmd12;
			broken-cd;
			little-endian;
			bus-width = <4>;
			status = "disabled";
		};

@@ -277,33 +313,36 @@
		};

		gpio1: gpio@2300000 {
			compatible = "fsl,qoriq-gpio";
			compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
			reg = <0x0 0x2300000 0x0 0x10000>;
			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
			little-endian;
		};

		gpio2: gpio@2310000 {
			compatible = "fsl,qoriq-gpio";
			compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
			reg = <0x0 0x2310000 0x0 0x10000>;
			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
			little-endian;
		};

		gpio3: gpio@2320000 {
			compatible = "fsl,qoriq-gpio";
			compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
			reg = <0x0 0x2320000 0x0 0x10000>;
			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
			little-endian;
		};

		usb0: usb@3100000 {
@@ -503,6 +542,89 @@
			status = "disabled";
		};

		tmu: tmu@1f00000 {
			compatible = "fsl,qoriq-tmu";
			reg = <0x0 0x1f80000 0x0 0x10000>;
			interrupts = <0 23 0x4>;
			fsl,tmu-range = <0xb0000 0xa0026 0x80048 0x70061>;
			fsl,tmu-calibration = <0x00000000 0x00000024
					       0x00000001 0x0000002b
					       0x00000002 0x00000031
					       0x00000003 0x00000038
					       0x00000004 0x0000003f
					       0x00000005 0x00000045
					       0x00000006 0x0000004c
					       0x00000007 0x00000053
					       0x00000008 0x00000059
					       0x00000009 0x00000060
					       0x0000000a 0x00000066
					       0x0000000b 0x0000006d

					       0x00010000 0x0000001c
					       0x00010001 0x00000024
					       0x00010002 0x0000002c
					       0x00010003 0x00000035
					       0x00010004 0x0000003d
					       0x00010005 0x00000045
					       0x00010006 0x0000004d
					       0x00010007 0x00000045
					       0x00010008 0x0000005e
					       0x00010009 0x00000066
					       0x0001000a 0x0000006e

					       0x00020000 0x00000018
					       0x00020001 0x00000022
					       0x00020002 0x0000002d
					       0x00020003 0x00000038
					       0x00020004 0x00000043
					       0x00020005 0x0000004d
					       0x00020006 0x00000058
					       0x00020007 0x00000063
					       0x00020008 0x0000006e

					       0x00030000 0x00000010
					       0x00030001 0x0000001c
					       0x00030002 0x00000029
					       0x00030003 0x00000036
					       0x00030004 0x00000042
					       0x00030005 0x0000004f
					       0x00030006 0x0000005b
					       0x00030007 0x00000068>;
			little-endian;
			#thermal-sensor-cells = <1>;
		};

		thermal-zones {
			core-cluster {
				polling-delay-passive = <1000>;
				polling-delay = <5000>;
				thermal-sensors = <&tmu 0>;

				trips {
					core_cluster_alert: core-cluster-alert {
						temperature = <85000>;
						hysteresis = <2000>;
						type = "passive";
					};

					core_cluster_crit: core-cluster-crit {
						temperature = <95000>;
						hysteresis = <2000>;
						type = "critical";
					};
				};

				cooling-maps {
					map0 {
						trip = <&core_cluster_alert>;
						cooling-device =
							<&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
							<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
					};
				};
			};
		};

		pcie@1f0000000 { /* Integrated Endpoint Root Complex */
			compatible = "pci-host-ecam-generic";
			reg = <0x01 0xf0000000 0x0 0x100000>;
@@ -551,9 +673,10 @@
		interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>,
			     <0 223 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-names = "DE", "SE";
		clocks = <&dpclk>, <&aclk>, <&aclk>, <&pclk>;
		clocks = <&dpclk 0>, <&aclk>, <&aclk>, <&pclk>;
		clock-names = "pxlclk", "mclk", "aclk", "pclk";
		arm,malidp-output-port-lines = /bits/ 8 <8 8 8>;
		arm,malidp-arqos-value = <0xd000d000>;

		port {
			dp0_out: endpoint {
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