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Commit e86a3710 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "msm: pcie: correct PCIe1 and PCIe2 clock order"

parents 528b8e52 551af1de

drivers/pci/controller/pci-msm.c

+2 −2
Original line number Diff line number Diff line
@@ -886,9 +886,9 @@ static struct msm_pcie_clk_info_t 
	{NULL, "pcie_1_sleep_clk", 0, false, false},

	{NULL, "pcie_phy_refgen_clk", 0, false, true},

	{NULL, "pcie_tbu_clk", 0, false, true},

	{NULL, "pcie_ddrss_sf_tbu_clk", 0, false, true},

	{NULL, "pcie_aggre_noc_0_axi_clk", 0, false, false},

	{NULL, "pcie_aggre_noc_1_axi_clk", 0, false, false},

	{NULL, "pcie_ddrss_sf_tbu_clk", 0, false, true},

	{NULL, "pcie_phy_cfg_ahb_clk", 0, false, false},

	{NULL, "pcie_phy_aux_clk", 0, false, false},

	{NULL, "pcie_pipe_clk_mux", 0, false, false},
@@ -906,9 +906,9 @@ static struct msm_pcie_clk_info_t 
	{NULL, "pcie_2_sleep_clk", 0, false, false},

	{NULL, "pcie_phy_refgen_clk", 0, false, true},

	{NULL, "pcie_tbu_clk", 0, false, true},

	{NULL, "pcie_ddrss_sf_tbu_clk", 0, false, true},

	{NULL, "pcie_aggre_noc_0_axi_clk", 0, false, false},

	{NULL, "pcie_aggre_noc_1_axi_clk", 0, false, false},

	{NULL, "pcie_ddrss_sf_tbu_clk", 0, false, true},

	{NULL, "pcie_phy_cfg_ahb_clk", 0, false, false},

	{NULL, "pcie_phy_aux_clk", 0, false, false},

	{NULL, "pcie_pipe_clk_mux", 0, false, false},