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Commit e7bd3e24 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'devicetree-fixes-for-5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux 

Pull Devicetree fixes from Rob Herring:

 - Update checkpatch.pl to use DT vendor-prefixes.yaml

 - Fix DT binding references to files converted to DT schema

 - Clean-up Arm CPU binding examples to match schema

 - Add Sifive block versioning scheme documentation

 - Pass binding directory base to validation tools for reference lookups

* tag 'devicetree-fixes-for-5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux:
  checkpatch.pl: Update DT vendor prefix check
  dt: bindings: mtd: replace references to nand.txt with nand-controller.yaml
  dt-bindings: interrupt-controller: arm,gic: Fix schema errors in example
  dt-bindings: arm: Clean up CPU binding examples
  dt: fix refs that were renamed to json with the same file name
  dt-bindings: Pass binding directory to validation tools
  dt-bindings: sifive: describe sifive-blocks versioning
parents 86c2f5d6 852d095d

Documentation/devicetree/bindings/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -5,7 +5,7 @@ DT_MK_SCHEMA ?= dt-mk-schema 
DT_MK_SCHEMA_FLAGS := $(if $(DT_SCHEMA_FILES), -u)



quiet_cmd_chk_binding = CHKDT   $(patsubst $(srctree)/%,%,$<)

      cmd_chk_binding = $(DT_DOC_CHECKER) $< ; \

      cmd_chk_binding = $(DT_DOC_CHECKER) -u $(srctree)/$(src) $< ; \

                        $(DT_EXTRACT_EX) $< > $@



$(obj)/%.example.dts: $(src)/%.yaml FORCE

Documentation/devicetree/bindings/arm/arm-boards

+2 −2
Original line number Diff line number Diff line
@@ -216,7 +216,7 @@ Example: 
		#size-cells = <0>;



		A57_0: cpu@0 {

			compatible = "arm,cortex-a57","arm,armv8";

			compatible = "arm,cortex-a57";

			reg = <0x0 0x0>;

			device_type = "cpu";

			enable-method = "psci";
@@ -225,7 +225,7 @@ Example: 
		.....



		A53_0: cpu@100 {

			compatible = "arm,cortex-a53","arm,armv8";

			compatible = "arm,cortex-a53";

			reg = <0x0 0x100>;

			device_type = "cpu";

			enable-method = "psci";

Documentation/devicetree/bindings/arm/cpu-capacity.txt

+6 −6
Original line number Diff line number Diff line
@@ -118,7 +118,7 @@ cpus { 
	};



	A57_0: cpu@0 {

		compatible = "arm,cortex-a57","arm,armv8";

		compatible = "arm,cortex-a57";

		reg = <0x0 0x0>;

		device_type = "cpu";

		enable-method = "psci";
@@ -129,7 +129,7 @@ cpus { 
	};



	A57_1: cpu@1 {

		compatible = "arm,cortex-a57","arm,armv8";

		compatible = "arm,cortex-a57";

		reg = <0x0 0x1>;

		device_type = "cpu";

		enable-method = "psci";
@@ -140,7 +140,7 @@ cpus { 
	};



	A53_0: cpu@100 {

		compatible = "arm,cortex-a53","arm,armv8";

		compatible = "arm,cortex-a53";

		reg = <0x0 0x100>;

		device_type = "cpu";

		enable-method = "psci";
@@ -151,7 +151,7 @@ cpus { 
	};



	A53_1: cpu@101 {

		compatible = "arm,cortex-a53","arm,armv8";

		compatible = "arm,cortex-a53";

		reg = <0x0 0x101>;

		device_type = "cpu";

		enable-method = "psci";
@@ -162,7 +162,7 @@ cpus { 
	};



	A53_2: cpu@102 {

		compatible = "arm,cortex-a53","arm,armv8";

		compatible = "arm,cortex-a53";

		reg = <0x0 0x102>;

		device_type = "cpu";

		enable-method = "psci";
@@ -173,7 +173,7 @@ cpus { 
	};



	A53_3: cpu@103 {

		compatible = "arm,cortex-a53","arm,armv8";

		compatible = "arm,cortex-a53";

		reg = <0x0 0x103>;

		device_type = "cpu";

		enable-method = "psci";

Documentation/devicetree/bindings/arm/omap/crossbar.txt

+1 −1
Original line number Diff line number Diff line
@@ -41,7 +41,7 @@ Examples: 
Consumer:

========

See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt and

Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt for

Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml for

further details.



An interrupt consumer on an SoC using crossbar will use:

Documentation/devicetree/bindings/clock/samsung,s5pv210-clock.txt

+1 −1
Original line number Diff line number Diff line
@@ -35,7 +35,7 @@ board device tree, including the system base clock, as selected by XOM[0] 
pin of the SoC. Refer to generic fixed rate clock bindings

documentation[1] for more information how to specify these clocks.



[1] Documentation/devicetree/bindings/clock/fixed-clock.txt

[1] Documentation/devicetree/bindings/clock/fixed-clock.yaml



Example: Clock controller node: