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Commit e7534198 authored by Guo Ren's avatar Guo Ren
Browse files

csky: Fixup some error count in 810 & 860. 



CK810 pmu only support event with index 0-8 and 0xd; CK860 only
support event 1~4, 0xa~0x1b. So do not register unsupport event
to hardware cache event, which may leader to unknown behavior.

Signed-off-by: default avatarMao Han <han_mao@c-sky.com>
Signed-off-by: default avatarGuo Ren <ren_guo@c-sky.com>
parent d41435d9

arch/csky/kernel/perf_event.c

+54 −6
Original line number Diff line number Diff line
@@ -728,6 +728,20 @@ static const int csky_pmu_hw_map[PERF_COUNT_HW_MAX] = { 
#define CACHE_OP_UNSUPPORTED	0xffff

static const int csky_pmu_cache_map[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = {

	[C(L1D)] = {

#ifdef CONFIG_CPU_CK810

		[C(OP_READ)] = {

			[C(RESULT_ACCESS)]	= CACHE_OP_UNSUPPORTED,

			[C(RESULT_MISS)]	= CACHE_OP_UNSUPPORTED,

		},

		[C(OP_WRITE)] = {

			[C(RESULT_ACCESS)]	= CACHE_OP_UNSUPPORTED,

			[C(RESULT_MISS)]	= CACHE_OP_UNSUPPORTED,

		},

		[C(OP_PREFETCH)] = {

			[C(RESULT_ACCESS)]	= 0x5,

			[C(RESULT_MISS)]	= 0x6,

		},

#else

		[C(OP_READ)] = {

			[C(RESULT_ACCESS)]	= 0x14,

			[C(RESULT_MISS)]	= 0x15,
@@ -737,9 +751,10 @@ static const int csky_pmu_cache_map[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = { 
			[C(RESULT_MISS)]	= 0x17,

		},

		[C(OP_PREFETCH)] = {

			[C(RESULT_ACCESS)]	= 0x5,

			[C(RESULT_MISS)]	= 0x6,

			[C(RESULT_ACCESS)]	= CACHE_OP_UNSUPPORTED,

			[C(RESULT_MISS)]	= CACHE_OP_UNSUPPORTED,

		},

#endif

	},

	[C(L1I)] = {

		[C(OP_READ)] = {
@@ -756,6 +771,20 @@ static const int csky_pmu_cache_map[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = { 
		},

	},

	[C(LL)] = {

#ifdef CONFIG_CPU_CK810

		[C(OP_READ)] = {

			[C(RESULT_ACCESS)]	= CACHE_OP_UNSUPPORTED,

			[C(RESULT_MISS)]	= CACHE_OP_UNSUPPORTED,

		},

		[C(OP_WRITE)] = {

			[C(RESULT_ACCESS)]	= CACHE_OP_UNSUPPORTED,

			[C(RESULT_MISS)]	= CACHE_OP_UNSUPPORTED,

		},

		[C(OP_PREFETCH)] = {

			[C(RESULT_ACCESS)]	= 0x7,

			[C(RESULT_MISS)]	= 0x8,

		},

#else

		[C(OP_READ)] = {

			[C(RESULT_ACCESS)]	= 0x18,

			[C(RESULT_MISS)]	= 0x19,
@@ -765,29 +794,48 @@ static const int csky_pmu_cache_map[C(MAX)][C(OP_MAX)][C(RESULT_MAX)] = { 
			[C(RESULT_MISS)]	= 0x1b,

		},

		[C(OP_PREFETCH)] = {

			[C(RESULT_ACCESS)]	= 0x7,

			[C(RESULT_MISS)]	= 0x8,

			[C(RESULT_ACCESS)]	= CACHE_OP_UNSUPPORTED,

			[C(RESULT_MISS)]	= CACHE_OP_UNSUPPORTED,

		},

#endif

	},

	[C(DTLB)] = {

#ifdef CONFIG_CPU_CK810

		[C(OP_READ)] = {

			[C(RESULT_ACCESS)]	= 0x5,

			[C(RESULT_MISS)]	= 0xb,

			[C(RESULT_ACCESS)]	= CACHE_OP_UNSUPPORTED,

			[C(RESULT_MISS)]	= CACHE_OP_UNSUPPORTED,

		},

		[C(OP_WRITE)] = {

			[C(RESULT_ACCESS)]	= CACHE_OP_UNSUPPORTED,

			[C(RESULT_MISS)]	= CACHE_OP_UNSUPPORTED,

		},

#else

		[C(OP_READ)] = {

			[C(RESULT_ACCESS)]	= 0x14,

			[C(RESULT_MISS)]	= 0xb,

		},

		[C(OP_WRITE)] = {

			[C(RESULT_ACCESS)]	= 0x16,

			[C(RESULT_MISS)]	= 0xb,

		},

#endif

		[C(OP_PREFETCH)] = {

			[C(RESULT_ACCESS)]	= CACHE_OP_UNSUPPORTED,

			[C(RESULT_MISS)]	= CACHE_OP_UNSUPPORTED,

		},

	},

	[C(ITLB)] = {

#ifdef CONFIG_CPU_CK810

		[C(OP_READ)] = {

			[C(RESULT_ACCESS)]	= CACHE_OP_UNSUPPORTED,

			[C(RESULT_MISS)]	= CACHE_OP_UNSUPPORTED,

		},

#else

		[C(OP_READ)] = {

			[C(RESULT_ACCESS)]	= 0x3,

			[C(RESULT_MISS)]	= 0xa,

		},

#endif

		[C(OP_WRITE)] = {

			[C(RESULT_ACCESS)]	= CACHE_OP_UNSUPPORTED,

			[C(RESULT_MISS)]	= CACHE_OP_UNSUPPORTED,