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Commit e6a9a2c3 authored by Shashank Sharma's avatar Shashank Sharma Committed by Ville Syrjälä
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drm/edid: parse ycbcr 420 deep color information



CEA-861-F spec adds ycbcr420 deep color support information
in hf-vsdb block. This patch extends the existing hf-vsdb parsing
function by adding parsing of ycbcr420 deep color support from the
EDID and adding it into display information stored.

V2: Rebase
V3: Rebase
V4: Moved definition of y420_dc_modes into this patch, where its used
    (Ville)
V5: Optimize function, if(conditions) not reqd (Ville)
V6: Rebase
V7: Rebase

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Jose Abreu <joabreu@synopsys.com>
Signed-off-by: default avatarShashank Sharma <shashank.sharma@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1499960000-9232-8-git-send-email-shashank.sharma@intel.com


[vsyrjala: Fix sparse indentation warn]
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
parent 832d4f2f
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+12 −0
Original line number Diff line number Diff line
@@ -4202,6 +4202,16 @@ drm_default_rgb_quant_range(const struct drm_display_mode *mode)
}
EXPORT_SYMBOL(drm_default_rgb_quant_range);

static void drm_parse_ycbcr420_deep_color_info(struct drm_connector *connector,
					       const u8 *db)
{
	u8 dc_mask;
	struct drm_hdmi_info *hdmi = &connector->display_info.hdmi;

	dc_mask = db[7] & DRM_EDID_YCBCR420_DC_MASK;
	hdmi->y420_dc_modes |= dc_mask;
}

static void drm_parse_hdmi_forum_vsdb(struct drm_connector *connector,
				 const u8 *hf_vsdb)
{
@@ -4242,6 +4252,8 @@ static void drm_parse_hdmi_forum_vsdb(struct drm_connector *connector,
				scdc->scrambling.low_rates = true;
		}
	}

	drm_parse_ycbcr420_deep_color_info(connector, hf_vsdb);
}

static void drm_parse_hdmi_deep_color_info(struct drm_connector *connector,
+3 −0
Original line number Diff line number Diff line
@@ -154,6 +154,9 @@ struct drm_hdmi_info {

	/** @y420_cmdb_map: bitmap of SVD index, to extraxt vcb modes */
	u64 y420_cmdb_map;

	/** @y420_dc_modes: bitmap of deep color support index */
	u8 y420_dc_modes;
};

/**
+8 −0
Original line number Diff line number Diff line
@@ -213,6 +213,14 @@ struct detailed_timing {
#define DRM_EDID_HDMI_DC_30               (1 << 4)
#define DRM_EDID_HDMI_DC_Y444             (1 << 3)

/* YCBCR 420 deep color modes */
#define DRM_EDID_YCBCR420_DC_48		  (1 << 6)
#define DRM_EDID_YCBCR420_DC_36		  (1 << 5)
#define DRM_EDID_YCBCR420_DC_30		  (1 << 4)
#define DRM_EDID_YCBCR420_DC_MASK (DRM_EDID_YCBCR420_DC_48 | \
				    DRM_EDID_YCBCR420_DC_36 | \
				    DRM_EDID_YCBCR420_DC_30)

/* ELD Header Block */
#define DRM_ELD_HEADER_BLOCK_SIZE	4