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Commit e69b348a authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Nuke posting reads from plane update/disable funcs 



No need for the posting reads in the plane update/disable hooks.
If we need a posting read for something then a single one at the
very end would be sufficient. We have that anyway in the form
of eg. scanline/frame counter reads.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181101150605.18235-2-ville.syrjala@linux.intel.com


Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
parent b598a88e

drivers/gpu/drm/i915/intel_display.c

+0 −6
Original line number Diff line number Diff line
@@ -3363,7 +3363,6 @@ static void i9xx_update_plane(struct intel_plane *plane, 
			      intel_plane_ggtt_offset(plane_state) +

			      dspaddr_offset);

	}

	POSTING_READ_FW(reg);



	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);

}
@@ -3382,7 +3381,6 @@ static void i9xx_disable_plane(struct intel_plane *plane, 
		I915_WRITE_FW(DSPSURF(i9xx_plane), 0);

	else

		I915_WRITE_FW(DSPADDR(i9xx_plane), 0);

	POSTING_READ_FW(DSPCNTR(i9xx_plane));



	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);

}
@@ -9818,8 +9816,6 @@ static void i845_update_cursor(struct intel_plane *plane, 
		I915_WRITE_FW(CURPOS(PIPE_A), pos);

	}



	POSTING_READ_FW(CURCNTR(PIPE_A));



	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);

}
@@ -10048,8 +10044,6 @@ static void i9xx_update_cursor(struct intel_plane *plane, 
		I915_WRITE_FW(CURBASE(pipe), base);

	}



	POSTING_READ_FW(CURBASE(pipe));



	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);

}

drivers/gpu/drm/i915/intel_sprite.c

+0 −12
Original line number Diff line number Diff line
@@ -562,7 +562,6 @@ skl_program_plane(struct intel_plane *plane, 
	I915_WRITE_FW(PLANE_CTL(pipe, plane_id), plane_ctl);

	I915_WRITE_FW(PLANE_SURF(pipe, plane_id),

		      intel_plane_ggtt_offset(plane_state) + surf_addr);

	POSTING_READ_FW(PLANE_SURF(pipe, plane_id));



	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);

}
@@ -603,9 +602,7 @@ skl_disable_plane(struct intel_plane *plane, struct intel_crtc *crtc) 
	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);



	I915_WRITE_FW(PLANE_CTL(pipe, plane_id), 0);



	I915_WRITE_FW(PLANE_SURF(pipe, plane_id), 0);

	POSTING_READ_FW(PLANE_SURF(pipe, plane_id));



	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);

}
@@ -851,7 +848,6 @@ vlv_update_plane(struct intel_plane *plane, 
	I915_WRITE_FW(SPCNTR(pipe, plane_id), sprctl);

	I915_WRITE_FW(SPSURF(pipe, plane_id),

		      intel_plane_ggtt_offset(plane_state) + sprsurf_offset);

	POSTING_READ_FW(SPSURF(pipe, plane_id));



	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);

}
@@ -867,9 +863,7 @@ vlv_disable_plane(struct intel_plane *plane, struct intel_crtc *crtc) 
	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);



	I915_WRITE_FW(SPCNTR(pipe, plane_id), 0);



	I915_WRITE_FW(SPSURF(pipe, plane_id), 0);

	POSTING_READ_FW(SPSURF(pipe, plane_id));



	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);

}
@@ -1017,7 +1011,6 @@ ivb_update_plane(struct intel_plane *plane, 
	I915_WRITE_FW(SPRCTL(pipe), sprctl);

	I915_WRITE_FW(SPRSURF(pipe),

		      intel_plane_ggtt_offset(plane_state) + sprsurf_offset);

	POSTING_READ_FW(SPRSURF(pipe));



	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);

}
@@ -1035,9 +1028,7 @@ ivb_disable_plane(struct intel_plane *plane, struct intel_crtc *crtc) 
	/* Can't leave the scaler enabled... */

	if (IS_IVYBRIDGE(dev_priv))

		I915_WRITE_FW(SPRSCALE(pipe), 0);



	I915_WRITE_FW(SPRSURF(pipe), 0);

	POSTING_READ_FW(SPRSURF(pipe));



	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);

}
@@ -1184,7 +1175,6 @@ g4x_update_plane(struct intel_plane *plane, 
	I915_WRITE_FW(DVSCNTR(pipe), dvscntr);

	I915_WRITE_FW(DVSSURF(pipe),

		      intel_plane_ggtt_offset(plane_state) + dvssurf_offset);

	POSTING_READ_FW(DVSSURF(pipe));



	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);

}
@@ -1201,9 +1191,7 @@ g4x_disable_plane(struct intel_plane *plane, struct intel_crtc *crtc) 
	I915_WRITE_FW(DVSCNTR(pipe), 0);

	/* Disable the scaler */

	I915_WRITE_FW(DVSSCALE(pipe), 0);



	I915_WRITE_FW(DVSSURF(pipe), 0);

	POSTING_READ_FW(DVSSURF(pipe));



	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);

}