Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit e6489bd8 authored by Chris Lew's avatar Chris Lew
Browse files

dt-bindings: arm: msm: Introduce qsee_ipc_irq_bridge bindings 

QSEE needs to occasionally send sideband signals to APPS userspace. The
qsee_ipc_irq_bridge creates a device node for userspace to poll on and
posts notifications about interrupt and ssr events to this node.

Change-Id: Ia895a1c6e5a31b762d61fef034244f245e1113e6
parent aa5428ff

bindings/arm/msm/qsee_ipc_irq_bridge.txt

0 → 100644
+30 −0
Original line number Diff line number Diff line 
Qualcomm Technologies, Inc. Secure Execution Environment IPC Interrupt Bridge



[Root level node]

Required properties:

-compatible : should be "qcom,qsee-ipc-irq-bridge";



[Second level nodes]

qcom,qsee-ipc-irq-subsystem

Required properties:

-qcom,dev-name: the bridge device name

-interrupt: IPC interrupt line from remote subsystem to QSEE

-label : The name of this subsystem.



Required properties if interrupt type is IRQ_TYPE_LEVEL_HIGH[4]:

-qcom,rx-irq-clr : the register to clear the level triggered rx interrupt

-qcom,rx-irq-clr-mask : the bitmask to clear the rx interrupt



Example:



	qcom,qsee_ipc_irq_bridge {

		compatible = "qcom,qsee-ipc-irq-bridge";



		qcom,qsee-ipc-irq-spss {

			qcom,rx-irq-clr = <0x1d08008 0x4>;

			qcom,rx-irq-clr-mask = <0x2>;

			qcom,dev-name = "qsee_ipc_irq_spss";

			interrupts = <0 349 4>;

			label = "spss";

		};

	};