Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit e6365084 authored by Andy Lutomirski's avatar Andy Lutomirski Committed by Ingo Molnar
Browse files

x86/fpu: Finish excising 'eagerfpu' 



Now that eagerfpu= is gone, remove it from the docs and some
comments.  Also sync the changes to tools/.

Signed-off-by: default avatarAndy Lutomirski <luto@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Josh Poimboeuf <jpoimboe@redhat.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Quentin Casasnovas <quentin.casasnovas@oracle.com>
Cc: Rik van Riel <riel@redhat.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/cf430dd4481d41280e93ac6cf0def1007a67fc8e.1476740397.git.luto@kernel.org


Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent 4d69f155

Documentation/kernel-parameters.txt

+0 −6
Original line number Diff line number Diff line
@@ -1074,12 +1074,6 @@ bytes respectively. Such letter suffixes can also be entirely omitted. 
	nopku		[X86] Disable Memory Protection Keys CPU feature found

			in some Intel CPUs.



	eagerfpu=	[X86]

			on	enable eager fpu restore

			off	disable eager fpu restore

			auto	selects the default scheme, which automatically

				enables eagerfpu restore for xsaveopt.



	module.async_probe [KNL]

			Enable asynchronous probe on this module.

arch/x86/include/asm/cpufeatures.h

+0 −1
Original line number Diff line number Diff line
@@ -104,7 +104,6 @@ 
#define X86_FEATURE_EXTD_APICID	( 3*32+26) /* has extended APICID (8 bits) */

#define X86_FEATURE_AMD_DCM     ( 3*32+27) /* multi-node processor */

#define X86_FEATURE_APERFMPERF	( 3*32+28) /* APERFMPERF */

/* free, was #define X86_FEATURE_EAGER_FPU	( 3*32+29) * "eagerfpu" Non lazy FPU restore */

#define X86_FEATURE_NONSTOP_TSC_S3 ( 3*32+30) /* TSC doesn't stop in S3 state */



/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */

arch/x86/include/asm/fpu/types.h

+0 −23
Original line number Diff line number Diff line
@@ -329,29 +329,6 @@ struct fpu { 
	 * the registers in the FPU are more recent than this state

	 * copy. If the task context-switches away then they get

	 * saved here and represent the FPU state.

	 *

	 * After context switches there may be a (short) time period

	 * during which the in-FPU hardware registers are unchanged

	 * and still perfectly match this state, if the tasks

	 * scheduled afterwards are not using the FPU.

	 *

	 * This is the 'lazy restore' window of optimization, which

	 * we track though 'fpu_fpregs_owner_ctx' and 'fpu->last_cpu'.

	 *

	 * We detect whether a subsequent task uses the FPU via setting

	 * CR0::TS to 1, which causes any FPU use to raise a #NM fault.

	 *

	 * During this window, if the task gets scheduled again, we

	 * might be able to skip having to do a restore from this

	 * memory buffer to the hardware registers - at the cost of

	 * incurring the overhead of #NM fault traps.

	 *

	 * Note that on modern CPUs that support the XSAVEOPT (or other

	 * optimized XSAVE instructions), we don't use #NM traps anymore,

	 * as the hardware can track whether FPU registers need saving

	 * or not. On such CPUs we activate the non-lazy ('eagerfpu')

	 * logic, which unconditionally saves/restores all FPU state

	 * across context switches. (if FPU state exists.)

	 */

	union fpregs_state		state;

	/*

arch/x86/mm/pkeys.c

+1 −2
Original line number Diff line number Diff line
@@ -141,8 +141,7 @@ u32 init_pkru_value = PKRU_AD_KEY( 1) | PKRU_AD_KEY( 2) | PKRU_AD_KEY( 3) | 
 * Called from the FPU code when creating a fresh set of FPU

 * registers.  This is called from a very specific context where

 * we know the FPU regstiers are safe for use and we can use PKRU

 * directly.  The fact that PKRU is only available when we are

 * using eagerfpu mode makes this possible.

 * directly.

 */

void copy_init_pkru_to_fpregs(void)

{

tools/arch/x86/include/asm/cpufeatures.h

+0 −1
Original line number Diff line number Diff line
@@ -104,7 +104,6 @@ 
#define X86_FEATURE_EXTD_APICID	( 3*32+26) /* has extended APICID (8 bits) */

#define X86_FEATURE_AMD_DCM     ( 3*32+27) /* multi-node processor */

#define X86_FEATURE_APERFMPERF	( 3*32+28) /* APERFMPERF */

#define X86_FEATURE_EAGER_FPU	( 3*32+29) /* "eagerfpu" Non lazy FPU restore */

#define X86_FEATURE_NONSTOP_TSC_S3 ( 3*32+30) /* TSC doesn't stop in S3 state */



/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */