ARM: Realview/Versatile/Integrator: remove unused definitions from platform.h (e606a940) · Commits · e / devices / android_kernel_fairphone_FP5

arch/arm/mach-integrator/include/mach/platform.h

+2 −40

Original line number	Diff line number	Diff line
		@@ -23,9 +23,6 @@
		*
		* Integrator address map
		*
		* NOTE: This is a multi-hosted header file for use with uHAL and
		* supported debuggers.
		*
		* ***********************************************************************/

		#ifndef __address_h
		@@ -330,20 +327,6 @@
		*/
		#define PHYS_PCI_V3_BASE 0x62000000

		#define PCI_DRAMSIZE INTEGRATOR_SSRAM_SIZE

		/* 'export' these to UHAL */
		#define UHAL_PCI_IO PCI_IO_BASE
		#define UHAL_PCI_MEM PCI_MEM_BASE
		#define UHAL_PCI_ALLOC_IO_BASE 0x00004000
		#define UHAL_PCI_ALLOC_MEM_BASE PCI_MEM_BASE
		#define UHAL_PCI_MAX_SLOT 20

		/* ========================================================================
		* Start of uHAL definitions
		* ========================================================================
		*/

		/* ------------------------------------------------------------------------
		* Integrator Interrupt Controllers
		* ------------------------------------------------------------------------
		@@ -391,7 +374,7 @@
		*/

		/* ------------------------------------------------------------------------
		* LED's - The header LED is not accessible via the uHAL API
		* LED's
		* ------------------------------------------------------------------------
		*
		*/
		@@ -403,35 +386,19 @@

		#define LED_BANK INTEGRATOR_DBG_LEDS

		/*
		* Memory definitions - run uHAL out of SSRAM.
		*
		*/
		#define uHAL_MEMORY_SIZE INTEGRATOR_SSRAM_SIZE

		/*
		* Clean base - dummy
		*
		*/
		#define CLEAN_BASE INTEGRATOR_BOOT_ROM_HI

		/*
		* Timer definitions
		*
		* Only use timer 1 & 2
		* (both run at 24MHz and will need the clock divider set to 16).
		*
		* Timer 0 runs at bus frequency and therefore could vary and currently
		* uHAL can't handle that.
		*
		* Timer 0 runs at bus frequency
		*/

		#define INTEGRATOR_TIMER0_BASE INTEGRATOR_CT_BASE
		#define INTEGRATOR_TIMER1_BASE (INTEGRATOR_CT_BASE + 0x100)
		#define INTEGRATOR_TIMER2_BASE (INTEGRATOR_CT_BASE + 0x200)

		#define MAX_TIMER 2
		#define MAX_PERIOD 699050
		#define TICKS_PER_uSEC 24

		/*
		@@ -439,14 +406,9 @@
		*
		*/
		#define mSEC_1 1000
		#define mSEC_5 (mSEC_1 * 5)
		#define mSEC_10 (mSEC_1 * 10)
		#define mSEC_25 (mSEC_1 * 25)
		#define SEC_1 (mSEC_1 * 1000)

		#define INTEGRATOR_CSR_BASE 0x10000000
		#define INTEGRATOR_CSR_SIZE 0x10000000

		#endif

		/* END */

arch/arm/mach-realview/include/mach/platform.h

+0 −20

Original line number	Diff line number	Diff line
		@@ -231,12 +231,6 @@
		#define REALVIEW_INTREG_OFFSET 0x8 /* Interrupt control */
		#define REALVIEW_DECODE_OFFSET 0xC /* Fitted logic modules */

		/*
		* Clean base - dummy
		*
		*/
		#define CLEAN_BASE REALVIEW_BOOT_ROM_HI

		/*
		* System controller bit assignment
		*/
		@@ -249,20 +243,6 @@
		#define REALVIEW_TIMER4_EnSel 21


		#define MAX_TIMER 2
		#define MAX_PERIOD 699050
		#define TICKS_PER_uSEC 1

		/*
		* These are useconds NOT ticks.
		*
		*/
		#define mSEC_1 1000
		#define mSEC_5 (mSEC_1 * 5)
		#define mSEC_10 (mSEC_1 * 10)
		#define mSEC_25 (mSEC_1 * 25)
		#define SEC_1 (mSEC_1 * 1000)

		#define REALVIEW_CSR_BASE 0x10000000
		#define REALVIEW_CSR_SIZE 0x10000000

arch/arm/mach-versatile/include/mach/platform.h

+2 −24

Original line number	Diff line number	Diff line
		@@ -379,12 +379,6 @@
		#define SIC_INT_PCI3 30


		/*
		* Clean base - dummy
		*
		*/
		#define CLEAN_BASE VERSATILE_BOOT_ROM_HI

		/*
		* System controller bit assignment
		*/
		@@ -397,20 +391,6 @@
		#define VERSATILE_TIMER4_EnSel 21


		#define MAX_TIMER 2
		#define MAX_PERIOD 699050
		#define TICKS_PER_uSEC 1

		/*
		* These are useconds NOT ticks.
		*
		*/
		#define mSEC_1 1000
		#define mSEC_5 (mSEC_1 * 5)
		#define mSEC_10 (mSEC_1 * 10)
		#define mSEC_25 (mSEC_1 * 25)
		#define SEC_1 (mSEC_1 * 1000)

		#define VERSATILE_CSR_BASE 0x10000000
		#define VERSATILE_CSR_SIZE 0x10000000

		@@ -432,5 +412,3 @@
		#endif

		#endif

		/* END */