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Commit e528c2af authored by Manasi Navare's avatar Manasi Navare Committed by Joonas Lahtinen
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drm/i915/icl: Fix the macros for DFLEXDPMLE register bits 



This patch fixes the macros used for defining the DFLEXDPMLE
register bit fields. This accounts for changes in the spec.

Fixes: a2bc69a1 ("drm/i915/icl: Add register definition for DFLEXDPMLE")
Cc: Animesh Manna <animesh.manna@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Jose Roberto de Souza <jose.souza@intel.com>
Cc: <stable@vger.kernel.org> # v4.19+
Signed-off-by: default avatarManasi Navare <manasi.d.navare@intel.com>
Reviewed-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181023191248.26418-1-manasi.d.navare@intel.com


(cherry picked from commit b4335ec0)
Signed-off-by: default avatarJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
parent f42f3438

drivers/gpu/drm/i915/i915_reg.h

+6 −2
Original line number Diff line number Diff line
@@ -2095,8 +2095,12 @@ enum i915_power_well_id { 


/* ICL PHY DFLEX registers */

#define PORT_TX_DFLEXDPMLE1		_MMIO(0x1638C0)

#define   DFLEXDPMLE1_DPMLETC_MASK(n)	(0xf << (4 * (n)))

#define   DFLEXDPMLE1_DPMLETC(n, x)	((x) << (4 * (n)))

#define   DFLEXDPMLE1_DPMLETC_MASK(tc_port)	(0xf << (4 * (tc_port)))

#define   DFLEXDPMLE1_DPMLETC_ML0(tc_port)	(1 << (4 * (tc_port)))

#define   DFLEXDPMLE1_DPMLETC_ML1_0(tc_port)	(3 << (4 * (tc_port)))

#define   DFLEXDPMLE1_DPMLETC_ML3(tc_port)	(8 << (4 * (tc_port)))

#define   DFLEXDPMLE1_DPMLETC_ML3_2(tc_port)	(12 << (4 * (tc_port)))

#define   DFLEXDPMLE1_DPMLETC_ML3_0(tc_port)	(15 << (4 * (tc_port)))



/* BXT PHY Ref registers */

#define _PORT_REF_DW3_A			0x16218C