Loading arch/ia64/Kconfig +1 −0 Original line number Diff line number Diff line Loading @@ -26,6 +26,7 @@ config IA64 select GENERIC_IRQ_PROBE select GENERIC_PENDING_IRQ if SMP select IRQ_PER_CPU select GENERIC_IRQ_SHOW default y help The Itanium Processor Family is Intel's 64-bit successor to Loading arch/ia64/kernel/irq.c +2 −40 Original line number Diff line number Diff line Loading @@ -53,46 +53,8 @@ atomic_t irq_err_count; /* * /proc/interrupts printing: */ int show_interrupts(struct seq_file *p, void *v) int arch_show_interrupts(struct seq_file *p, int prec) { int i = *(loff_t *) v, j; struct irqaction * action; unsigned long flags; if (i == 0) { char cpuname[16]; seq_printf(p, " "); for_each_online_cpu(j) { snprintf(cpuname, 10, "CPU%d", j); seq_printf(p, "%10s ", cpuname); } seq_putc(p, '\n'); } if (i < NR_IRQS) { raw_spin_lock_irqsave(&irq_desc[i].lock, flags); action = irq_desc[i].action; if (!action) goto skip; seq_printf(p, "%3d: ",i); #ifndef CONFIG_SMP seq_printf(p, "%10u ", kstat_irqs(i)); #else for_each_online_cpu(j) { seq_printf(p, "%10u ", kstat_irqs_cpu(i, j)); } #endif seq_printf(p, " %14s", irq_desc[i].chip->name); seq_printf(p, " %s", action->name); for (action=action->next; action; action = action->next) seq_printf(p, ", %s", action->name); seq_putc(p, '\n'); skip: raw_spin_unlock_irqrestore(&irq_desc[i].lock, flags); } else if (i == NR_IRQS) seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count)); return 0; } Loading Loading
arch/ia64/Kconfig +1 −0 Original line number Diff line number Diff line Loading @@ -26,6 +26,7 @@ config IA64 select GENERIC_IRQ_PROBE select GENERIC_PENDING_IRQ if SMP select IRQ_PER_CPU select GENERIC_IRQ_SHOW default y help The Itanium Processor Family is Intel's 64-bit successor to Loading
arch/ia64/kernel/irq.c +2 −40 Original line number Diff line number Diff line Loading @@ -53,46 +53,8 @@ atomic_t irq_err_count; /* * /proc/interrupts printing: */ int show_interrupts(struct seq_file *p, void *v) int arch_show_interrupts(struct seq_file *p, int prec) { int i = *(loff_t *) v, j; struct irqaction * action; unsigned long flags; if (i == 0) { char cpuname[16]; seq_printf(p, " "); for_each_online_cpu(j) { snprintf(cpuname, 10, "CPU%d", j); seq_printf(p, "%10s ", cpuname); } seq_putc(p, '\n'); } if (i < NR_IRQS) { raw_spin_lock_irqsave(&irq_desc[i].lock, flags); action = irq_desc[i].action; if (!action) goto skip; seq_printf(p, "%3d: ",i); #ifndef CONFIG_SMP seq_printf(p, "%10u ", kstat_irqs(i)); #else for_each_online_cpu(j) { seq_printf(p, "%10u ", kstat_irqs_cpu(i, j)); } #endif seq_printf(p, " %14s", irq_desc[i].chip->name); seq_printf(p, " %s", action->name); for (action=action->next; action; action = action->next) seq_printf(p, ", %s", action->name); seq_putc(p, '\n'); skip: raw_spin_unlock_irqrestore(&irq_desc[i].lock, flags); } else if (i == NR_IRQS) seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count)); return 0; } Loading