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Commit e3cf3f7a authored by Pali Rohár's avatar Pali Rohár Committed by Greg Kroah-Hartman
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ARM: dts: armada-xp: Fix assigned-addresses for every PCIe Root Port



[ Upstream commit eab276787f456cbea89fabea110fe0728673d308 ]

BDF of resource in DT assigned-addresses property of Marvell PCIe Root Port
(PCI-to-PCI bridge) should match BDF in address part in that DT node name
as specified resource belongs to Marvell PCIe Root Port itself.

Fixes: 9d8f44f0 ("arm: mvebu: add PCIe Device Tree informations for Armada XP")
Fixes: 12b69a59 ("ARM: mvebu: second PCIe unit of Armada XP mv78230 is only x1 capable")
Fixes: 2163e61c ("ARM: mvebu: fix second and third PCIe unit of Armada XP mv78260")
Signed-off-by: default avatarPali Rohár <pali@kernel.org>
Signed-off-by: default avatarGregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent e302758c
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+4 −4
Original line number Diff line number Diff line
@@ -97,7 +97,7 @@

			pcie2: pcie@2,0 {
				device_type = "pci";
				assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
				assigned-addresses = <0x82001000 0 0x44000 0 0x2000>;
				reg = <0x1000 0 0 0 0>;
				#address-cells = <3>;
				#size-cells = <2>;
@@ -115,7 +115,7 @@

			pcie3: pcie@3,0 {
				device_type = "pci";
				assigned-addresses = <0x82000800 0 0x48000 0 0x2000>;
				assigned-addresses = <0x82001800 0 0x48000 0 0x2000>;
				reg = <0x1800 0 0 0 0>;
				#address-cells = <3>;
				#size-cells = <2>;
@@ -133,7 +133,7 @@

			pcie4: pcie@4,0 {
				device_type = "pci";
				assigned-addresses = <0x82000800 0 0x4c000 0 0x2000>;
				assigned-addresses = <0x82002000 0 0x4c000 0 0x2000>;
				reg = <0x2000 0 0 0 0>;
				#address-cells = <3>;
				#size-cells = <2>;
@@ -151,7 +151,7 @@

			pcie5: pcie@5,0 {
				device_type = "pci";
				assigned-addresses = <0x82000800 0 0x80000 0 0x2000>;
				assigned-addresses = <0x82002800 0 0x80000 0 0x2000>;
				reg = <0x2800 0 0 0 0>;
				#address-cells = <3>;
				#size-cells = <2>;
+8 −8
Original line number Diff line number Diff line
@@ -112,7 +112,7 @@

			pcie2: pcie@2,0 {
				device_type = "pci";
				assigned-addresses = <0x82000800 0 0x44000 0 0x2000>;
				assigned-addresses = <0x82001000 0 0x44000 0 0x2000>;
				reg = <0x1000 0 0 0 0>;
				#address-cells = <3>;
				#size-cells = <2>;
@@ -130,7 +130,7 @@

			pcie3: pcie@3,0 {
				device_type = "pci";
				assigned-addresses = <0x82000800 0 0x48000 0 0x2000>;
				assigned-addresses = <0x82001800 0 0x48000 0 0x2000>;
				reg = <0x1800 0 0 0 0>;
				#address-cells = <3>;
				#size-cells = <2>;
@@ -148,7 +148,7 @@

			pcie4: pcie@4,0 {
				device_type = "pci";
				assigned-addresses = <0x82000800 0 0x4c000 0 0x2000>;
				assigned-addresses = <0x82002000 0 0x4c000 0 0x2000>;
				reg = <0x2000 0 0 0 0>;
				#address-cells = <3>;
				#size-cells = <2>;
@@ -166,7 +166,7 @@

			pcie5: pcie@5,0 {
				device_type = "pci";
				assigned-addresses = <0x82000800 0 0x80000 0 0x2000>;
				assigned-addresses = <0x82002800 0 0x80000 0 0x2000>;
				reg = <0x2800 0 0 0 0>;
				#address-cells = <3>;
				#size-cells = <2>;
@@ -184,7 +184,7 @@

			pcie6: pcie@6,0 {
				device_type = "pci";
				assigned-addresses = <0x82000800 0 0x84000 0 0x2000>;
				assigned-addresses = <0x82003000 0 0x84000 0 0x2000>;
				reg = <0x3000 0 0 0 0>;
				#address-cells = <3>;
				#size-cells = <2>;
@@ -202,7 +202,7 @@

			pcie7: pcie@7,0 {
				device_type = "pci";
				assigned-addresses = <0x82000800 0 0x88000 0 0x2000>;
				assigned-addresses = <0x82003800 0 0x88000 0 0x2000>;
				reg = <0x3800 0 0 0 0>;
				#address-cells = <3>;
				#size-cells = <2>;
@@ -220,7 +220,7 @@

			pcie8: pcie@8,0 {
				device_type = "pci";
				assigned-addresses = <0x82000800 0 0x8c000 0 0x2000>;
				assigned-addresses = <0x82004000 0 0x8c000 0 0x2000>;
				reg = <0x4000 0 0 0 0>;
				#address-cells = <3>;
				#size-cells = <2>;
@@ -238,7 +238,7 @@

			pcie9: pcie@9,0 {
				device_type = "pci";
				assigned-addresses = <0x82000800 0 0x42000 0 0x2000>;
				assigned-addresses = <0x82004800 0 0x42000 0 0x2000>;
				reg = <0x4800 0 0 0 0>;
				#address-cells = <3>;
				#size-cells = <2>;