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Commit e38ca2b3 authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher
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drm/amdgpu: when dpm disabled, also can enable uvd cg/pg. 



Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Acked-by: default avatarChristian König <christian.koenig@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent d7d29553

drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c

+9 −0
Original line number Diff line number Diff line
@@ -1113,6 +1113,11 @@ static void amdgpu_uvd_idle_work_handler(struct work_struct *work) 
			amdgpu_dpm_enable_uvd(adev, false);

		} else {

			amdgpu_asic_set_uvd_clocks(adev, 0, 0);

			/* shutdown the UVD block */

			amdgpu_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_UVD,

							    AMD_PG_STATE_GATE);

			amdgpu_set_clockgating_state(adev, AMD_IP_BLOCK_TYPE_UVD,

							    AMD_CG_STATE_GATE);

		}

	} else {

		schedule_delayed_work(&adev->uvd.idle_work, UVD_IDLE_TIMEOUT);
@@ -1129,6 +1134,10 @@ void amdgpu_uvd_ring_begin_use(struct amdgpu_ring *ring) 
			amdgpu_dpm_enable_uvd(adev, true);

		} else {

			amdgpu_asic_set_uvd_clocks(adev, 53300, 40000);

			amdgpu_set_clockgating_state(adev, AMD_IP_BLOCK_TYPE_UVD,

							    AMD_CG_STATE_UNGATE);

			amdgpu_set_powergating_state(adev, AMD_IP_BLOCK_TYPE_UVD,

							    AMD_PG_STATE_UNGATE);

		}

	}

}