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Commit e3842cbf authored by Linus Torvalds's avatar Linus Torvalds
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Merge tag 'dmaengine-4.10-rc1' of git://git.infradead.org/users/vkoul/slave-dma 

Pull dmaengine updates from Vinod Koul:
 "Fairly routine update this time around with all changes specific to
  drivers:

   - New driver for STMicroelectronics FDMA
   - Memory-to-memory transfers on dw dmac
   - Support for slave maps on pl08x devices
   - Bunch of driver fixes to use dma_pool_zalloc
   - Bunch of compile and warning fixes spread across drivers"

[ The ST FDMA driver already came in earlier through the remoteproc tree ]

* tag 'dmaengine-4.10-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (68 commits)
  dmaengine: sirf-dma: remove unused ‘sdesc’
  dmaengine: pl330: remove unused ‘regs’
  dmaengine: s3c24xx: remove unused ‘cdata’
  dmaengine: stm32-dma: remove unused ‘src_addr’
  dmaengine: stm32-dma: remove unused ‘dst_addr’
  dmaengine: stm32-dma: remove unused ‘sfcr’
  dmaengine: pch_dma: remove unused ‘cookie’
  dmaengine: mic_x100_dma: remove unused ‘data’
  dmaengine: img-mdc: remove unused ‘prev_phys’
  dmaengine: usb-dmac: remove unused ‘uchan’
  dmaengine: ioat: remove unused ‘res’
  dmaengine: ioat: remove unused ‘ioat_dma’
  dmaengine: ioat: remove unused ‘is_raid_device’
  dmaengine: pl330: do not generate unaligned access
  dmaengine: k3dma: move to dma_pool_zalloc
  dmaengine: at_hdmac: move to dma_pool_zalloc
  dmaengine: at_xdmac: don't restore unsaved status
  dmaengine: ioat: set error code on failures
  dmaengine: ioat: set error code on failures
  dmaengine: DW DMAC: add multi-block property to device tree
  ...
parents 4d98ead1 4625d2a5

Documentation/devicetree/bindings/dma/nbpfaxi.txt

+8 −0
Original line number Diff line number Diff line
@@ -23,6 +23,14 @@ Required properties 
#define NBPF_SLAVE_RQ_LEVEL	4



Optional properties:

- max-burst-mem-read:	limit burst size for memory reads

  (DMA_MEM_TO_MEM/DMA_MEM_TO_DEV) to this value, specified in bytes, rather

  than using the maximum burst size allowed by the hardware's buffer size.

- max-burst-mem-write:	limit burst size for memory writes

  (DMA_DEV_TO_MEM/DMA_MEM_TO_MEM) to this value, specified in bytes, rather

  than using the maximum burst size allowed by the hardware's buffer size.

  If both max-burst-mem-read and max-burst-mem-write are set, DMA_MEM_TO_MEM

  will use the lower value.



You can use dma-channels and dma-requests as described in dma.txt, although they

won't be used, this information is derived from the compatibility string.

Documentation/devicetree/bindings/dma/qcom_hidma_mgmt.txt

+9 −3
Original line number Diff line number Diff line
@@ -5,13 +5,13 @@ memcpy and memset capabilities. It has been designed for virtualized 
environments.



Each HIDMA HW instance consists of multiple DMA channels. These channels

share the same bandwidth. The bandwidth utilization can be parititioned

share the same bandwidth. The bandwidth utilization can be partitioned

among channels based on the priority and weight assignments.



There are only two priority levels and 15 weigh assignments possible.



Other parameters here determine how much of the system bus this HIDMA

instance can use like maximum read/write request and and number of bytes to

instance can use like maximum read/write request and number of bytes to

read/write in a single burst.



Main node required properties:
@@ -47,12 +47,18 @@ When the OS is not in control of the management interface (i.e. it's a guest), 
the channel nodes appear on their own, not under a management node.



Required properties:

- compatible: must contain "qcom,hidma-1.0"

- compatible: must contain "qcom,hidma-1.0" for initial HW or "qcom,hidma-1.1"

for MSI capable HW.

- reg: Addresses for the transfer and event channel

- interrupts: Should contain the event interrupt

- desc-count: Number of asynchronous requests this channel can handle

- iommus: required a iommu node



Optional properties for MSI:

- msi-parent : See the generic MSI binding described in

 devicetree/bindings/interrupt-controller/msi.txt for a description of the

 msi-parent property.



Example:



Hypervisor OS configuration:

Documentation/devicetree/bindings/dma/renesas,rcar-dmac.txt

+1 −0
Original line number Diff line number Diff line
@@ -24,6 +24,7 @@ Required Properties: 
		- "renesas,dmac-r8a7793" (R-Car M2-N)

		- "renesas,dmac-r8a7794" (R-Car E2)

		- "renesas,dmac-r8a7795" (R-Car H3)

		- "renesas,dmac-r8a7796" (R-Car M3-W)



- reg: base address and length of the registers block for the DMAC

Documentation/devicetree/bindings/dma/snps-dma.txt

+2 −0
Original line number Diff line number Diff line
@@ -27,6 +27,8 @@ Optional properties: 
  that services interrupts for this device

- is_private: The device channels should be marked as private and not for by the

  general purpose DMA channel allocator. False if not passed.

- multi-block: Multi block transfers supported by hardware. Array property with

  one cell per channel. 0: not supported, 1 (default): supported.



Example:

Documentation/dmaengine/provider.txt

+1 −1
Original line number Diff line number Diff line
@@ -384,7 +384,7 @@ where to put them) 
    - The descriptor should be prepared for reuse by invoking

      dmaengine_desc_set_reuse() which will set DMA_CTRL_REUSE.

    - dmaengine_desc_set_reuse() will succeed only when channel support

      reusable descriptor as exhibited by capablities

      reusable descriptor as exhibited by capabilities

    - As a consequence, if a device driver wants to skip the dma_map_sg() and

      dma_unmap_sg() in between 2 transfers, because the DMA'd data wasn't used,

      it can resubmit the transfer right after its completion.