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Commit e3674c9a authored by Pratham Pratap's avatar Pratham Pratap Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: Enable SMMU Stage1 for USB on Shima 

This change enables SMMU Stage1 for USB on Shima.

Change-Id: I4e0e32ffc7e23d0e92d31b271b2571c49f45c7f2
parent ba09ad8e

qcom/shima-usb.dtsi

+4 −0
Original line number Diff line number Diff line
@@ -7,9 +7,13 @@ 
		reg = <0xa600000 0x100000>;

		reg-names = "core_base";



		iommus = <&apps_smmu 0xa0 0x0>;

		qcom,iommu-dma = "atomic";

		qcom,iommu-dma-addr-pool = <0x90000000 0x60000000>;

		#address-cells = <1>;

		#size-cells = <1>;

		ranges;

		dma-ranges;



		interrupts-extended = <&pdc 14 IRQ_TYPE_EDGE_RISING>,

			     <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,