of: document new emc-timings subnode in nvidia,tegra124-car

  In clock consumers, this cell represents the bit number in the CAR's

  array of CLK_RST_CONTROLLER_RST_DEVICES_* registers.

The node should contain a "emc-timings" subnode for each supported RAM type (see

field RAM_CODE in register PMC_STRAPPING_OPT_A).

Required properties for "emc-timings" nodes :

- nvidia,ram-code : Should contain the value of RAM_CODE this timing set

  is used for.

Each "emc-timings" node should contain a "timing" subnode for every supported

EMC clock rate.

Required properties for "timing" nodes :

- clock-frequency : Should contain the memory clock rate to which this timing

relates.

- nvidia,parent-clock-frequency : Should contain the rate at which the current

parent of the EMC clock should be running at this timing.

- clocks : Must contain an entry for each entry in clock-names.

  See ../clocks/clock-bindings.txt for details.

- clock-names : Must include the following entries:

  - emc-parent : the clock that should be the parent of the EMC clock at this

timing.

Example SoC include file:

/ {

	tegra_car: clock {

	tegra_car: clock@60006000 {

		compatible = "nvidia,tegra124-car";

		reg = <0x60006000 0x1000>;

		#clock-cells = <1>;

	&tegra_car {

		clocks = <&clk_32k> <&osc>;

	};

	clock@60006000 {

		emc-timings-3 {

			nvidia,ram-code = <3>;

			timing-12750000 {

				clock-frequency = <12750000>;

				nvidia,parent-clock-frequency = <408000000>;

				clocks = <&tegra_car TEGRA124_CLK_PLL_P>;

				clock-names = "emc-parent";

			};

			timing-20400000 {

				clock-frequency = <20400000>;

				nvidia,parent-clock-frequency = <408000000>;

				clocks = <&tegra_car TEGRA124_CLK_PLL_P>;

				clock-names = "emc-parent";

			};

		};

	};

};