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Commit e304ec77 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Upgrade Lahaina's memory map to version 4"

parents 2f984601 8dcdb6e7
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+25 −16
Original line number Diff line number Diff line
@@ -349,42 +349,42 @@

		pil_adsp_mem: pil_adsp_region@86100000 {
			no-map;
			reg = <0x0 0x86100000 0x0 0x2000000>;
			reg = <0x0 0x86100000 0x0 0x2100000>;
		};

		pil_slpi_mem: pil_slpi_region@88100000 {
		pil_slpi_mem: pil_slpi_region@88200000 {
			no-map;
			reg = <0x0 0x88100000 0x0 0x1500000>;
			reg = <0x0 0x88200000 0x0 0x1500000>;
		};

		pil_cdsp_mem: pil_cdsp_region@89600000 {
		pil_cdsp_mem: pil_cdsp_region@89700000 {
			no-map;
			reg = <0x0 0x89600000 0x0 0x1400000>;
			reg = <0x0 0x89700000 0x0 0x1e00000>;
		};

		pil_spss_mem: pil_spss_region@8aa00000 {
		pil_ipa_fw_mem: pil_ipa_fw_region@8b500000 {
			no-map;
			reg = <0x0 0x8aa00000 0x0 0x100000>;
			reg = <0x0 0x8b500000 0x0 0x10000>;
		};

		pil_ipa_fw_mem: pil_ipa_fw_region@8ab00000 {
		pil_ipa_gsi_mem: pil_ipa_gsi_region@8b510000 {
			no-map;
			reg = <0x0 0x8ab00000 0x0 0x10000>;
			reg = <0x0 0x8b510000 0x0 0xa000>;
		};

		pil_ipa_gsi_mem: pil_ipa_gsi_region@8ab10000 {
		pil_gpu_mem: pil_gpu_region@8b51a000 {
			no-map;
			reg = <0x0 0x8ab10000 0x0 0xa000>;
			reg = <0x0 0x8b51a000 0x0 0x2000>;
		};

		pil_gpu_mem: pil_gpu_region@8ab1a000 {
		pil_spss_mem: pil_spss_region@8b600000 {
			no-map;
			reg = <0x0 0x8ab1a000 0x0 0x2000>;
			reg = <0x0 0x8b600000 0x0 0x100000>;
		};

		pil_modem_mem: modem_region@8ac00000 {
		pil_modem_mem: modem_region@8b800000 {
			no-map;
			reg = <0x0 0x8ac00000 0x0 0x10000000>;
			reg = <0x0 0x8b800000 0x0 0x10000000>;
		};

		removed_mem: removed_region@c0000000 {
@@ -392,12 +392,21 @@
			reg = <0x0 0xc0000000 0x0 0x5100000>;
		};

		hyp_reserved_mem: qheebsp_dbg_vm_hyp_region@d0000000 {
			no-map;
			reg = <0x0 0xd0000000 0x0 0x800000>;
		};

		pil_trustedvm_mem: pil_trustedvm_region@d0800000 {
			compatible = "removed-dma-pool";
			no-map;
			reg = <0x0 0xd0800000 0x0 0x8000000>;
		};

		trustedvm_trace_buffer: trustedvm_trace_region@d8800000 {
			no-map;
			reg = <0x0 0xd8800000 0x0 0x1e00000>;
		};

		adsp_mem: adsp_region {
			compatible = "shared-dma-pool";
			alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;