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Commit e2585ea7 authored by Aviad Krawczyk's avatar Aviad Krawczyk Committed by David S. Miller
Browse files

net-next/hinic: Add Rx handler 



Set the io resources in the nic and handle rx events by qp operations.

Signed-off-by: default avatarAviad Krawczyk <aviad.krawczyk@huawei.com>
Signed-off-by: default avatarZhao Chen <zhaochen6@huawei.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 7ef37fe4

drivers/net/ethernet/huawei/hinic/hinic_dev.h

+1 −0
Original line number Diff line number Diff line
@@ -43,6 +43,7 @@ struct hinic_dev { 
	struct hinic_hwdev              *hwdev;



	u32                             msg_enable;

	unsigned int                    rx_weight;



	unsigned int                    flags;

drivers/net/ethernet/huawei/hinic/hinic_hw_csr.h

+1 −0
Original line number Diff line number Diff line
@@ -20,6 +20,7 @@ 
#define HINIC_CSR_FUNC_ATTR0_ADDR                       0x0

#define HINIC_CSR_FUNC_ATTR1_ADDR                       0x4



#define HINIC_CSR_FUNC_ATTR4_ADDR                       0x10

#define HINIC_CSR_FUNC_ATTR5_ADDR                       0x14



#define HINIC_DMA_ATTR_BASE                             0xC80

drivers/net/ethernet/huawei/hinic/hinic_hw_dev.c

+361 −0
Original line number Diff line number Diff line
@@ -20,6 +20,9 @@ 
#include <linux/errno.h>

#include <linux/slab.h>

#include <linux/bitops.h>

#include <linux/delay.h>

#include <linux/jiffies.h>

#include <linux/log2.h>

#include <linux/err.h>



#include "hinic_hw_if.h"
@@ -30,6 +33,10 @@ 
#include "hinic_hw_io.h"

#include "hinic_hw_dev.h"



#define IO_STATUS_TIMEOUT               100

#define OUTBOUND_STATE_TIMEOUT          100

#define DB_STATE_TIMEOUT                100



#define MAX_IRQS(max_qps, num_aeqs, num_ceqs)   \

		 (2 * (max_qps) + (num_aeqs) + (num_ceqs))
@@ -37,6 +44,15 @@ enum intr_type { 
	INTR_MSIX_TYPE,

};



enum io_status {

	IO_STOPPED = 0,

	IO_RUNNING = 1,

};



enum hw_ioctxt_set_cmdq_depth {

	HW_IOCTXT_SET_CMDQ_DEPTH_DEFAULT,

};



/* HW struct */

struct hinic_dev_cap {

	u8      status;
@@ -51,6 +67,31 @@ struct hinic_dev_cap { 
	u8      rsvd3[208];

};



struct rx_buf_sz {

	int     idx;

	size_t  sz;

};



static struct rx_buf_sz rx_buf_sz_table[] = {

	{0, 32},

	{1, 64},

	{2, 96},

	{3, 128},

	{4, 192},

	{5, 256},

	{6, 384},

	{7, 512},

	{8, 768},

	{9, 1024},

	{10, 1536},

	{11, 2048},

	{12, 3072},

	{13, 4096},

	{14, 8192},

	{15, 16384},

	{-1, -1},

};



/**

 * get_capability - convert device capabilities to NIC capabilities

 * @hwdev: the HW device to set and convert device capabilities for
@@ -235,6 +276,252 @@ int hinic_port_msg_cmd(struct hinic_hwdev *hwdev, enum hinic_port_cmd cmd, 
				 HINIC_MGMT_MSG_SYNC);

}



/**

 * init_fw_ctxt- Init Firmware tables before network mgmt and io operations

 * @hwdev: the NIC HW device

 *

 * Return 0 - Success, negative - Failure

 **/

static int init_fw_ctxt(struct hinic_hwdev *hwdev)

{

	struct hinic_hwif *hwif = hwdev->hwif;

	struct pci_dev *pdev = hwif->pdev;

	struct hinic_cmd_fw_ctxt fw_ctxt;

	struct hinic_pfhwdev *pfhwdev;

	u16 out_size;

	int err;



	if (!HINIC_IS_PF(hwif) && !HINIC_IS_PPF(hwif)) {

		dev_err(&pdev->dev, "Unsupported PCI Function type\n");

		return -EINVAL;

	}



	fw_ctxt.func_idx = HINIC_HWIF_FUNC_IDX(hwif);

	fw_ctxt.rx_buf_sz = HINIC_RX_BUF_SZ;



	pfhwdev = container_of(hwdev, struct hinic_pfhwdev, hwdev);



	err = hinic_port_msg_cmd(hwdev, HINIC_PORT_CMD_FWCTXT_INIT,

				 &fw_ctxt, sizeof(fw_ctxt),

				 &fw_ctxt, &out_size);

	if (err || (out_size != sizeof(fw_ctxt)) || fw_ctxt.status) {

		dev_err(&pdev->dev, "Failed to init FW ctxt, ret = %d\n",

			fw_ctxt.status);

		return -EFAULT;

	}



	return 0;

}



/**

 * set_hw_ioctxt - set the shape of the IO queues in FW

 * @hwdev: the NIC HW device

 * @rq_depth: rq depth

 * @sq_depth: sq depth

 *

 * Return 0 - Success, negative - Failure

 **/

static int set_hw_ioctxt(struct hinic_hwdev *hwdev, unsigned int rq_depth,

			 unsigned int sq_depth)

{

	struct hinic_hwif *hwif = hwdev->hwif;

	struct hinic_cmd_hw_ioctxt hw_ioctxt;

	struct pci_dev *pdev = hwif->pdev;

	struct hinic_pfhwdev *pfhwdev;

	int i;



	if (!HINIC_IS_PF(hwif) && !HINIC_IS_PPF(hwif)) {

		dev_err(&pdev->dev, "Unsupported PCI Function type\n");

		return -EINVAL;

	}



	hw_ioctxt.func_idx = HINIC_HWIF_FUNC_IDX(hwif);



	hw_ioctxt.set_cmdq_depth = HW_IOCTXT_SET_CMDQ_DEPTH_DEFAULT;

	hw_ioctxt.cmdq_depth = 0;



	hw_ioctxt.rq_depth  = ilog2(rq_depth);



	for (i = 0; ; i++) {

		if ((rx_buf_sz_table[i].sz == HINIC_RX_BUF_SZ) ||

		    (rx_buf_sz_table[i].sz == -1)) {

			hw_ioctxt.rx_buf_sz_idx = rx_buf_sz_table[i].idx;

			break;

		}

	}



	if (hw_ioctxt.rx_buf_sz_idx == -1)

		return -EINVAL;



	hw_ioctxt.sq_depth  = ilog2(sq_depth);



	pfhwdev = container_of(hwdev, struct hinic_pfhwdev, hwdev);



	return hinic_msg_to_mgmt(&pfhwdev->pf_to_mgmt, HINIC_MOD_COMM,

				 HINIC_COMM_CMD_HWCTXT_SET,

				 &hw_ioctxt, sizeof(hw_ioctxt), NULL,

				 NULL, HINIC_MGMT_MSG_SYNC);

}



static int wait_for_outbound_state(struct hinic_hwdev *hwdev)

{

	enum hinic_outbound_state outbound_state;

	struct hinic_hwif *hwif = hwdev->hwif;

	struct pci_dev *pdev = hwif->pdev;

	unsigned long end;



	end = jiffies + msecs_to_jiffies(OUTBOUND_STATE_TIMEOUT);

	do {

		outbound_state = hinic_outbound_state_get(hwif);



		if (outbound_state == HINIC_OUTBOUND_ENABLE)

			return 0;



		msleep(20);

	} while (time_before(jiffies, end));



	dev_err(&pdev->dev, "Wait for OUTBOUND - Timeout\n");

	return -EFAULT;

}



static int wait_for_db_state(struct hinic_hwdev *hwdev)

{

	struct hinic_hwif *hwif = hwdev->hwif;

	struct pci_dev *pdev = hwif->pdev;

	enum hinic_db_state db_state;

	unsigned long end;



	end = jiffies + msecs_to_jiffies(DB_STATE_TIMEOUT);

	do {

		db_state = hinic_db_state_get(hwif);



		if (db_state == HINIC_DB_ENABLE)

			return 0;



		msleep(20);

	} while (time_before(jiffies, end));



	dev_err(&pdev->dev, "Wait for DB - Timeout\n");

	return -EFAULT;

}



static int wait_for_io_stopped(struct hinic_hwdev *hwdev)

{

	struct hinic_cmd_io_status cmd_io_status;

	struct hinic_hwif *hwif = hwdev->hwif;

	struct pci_dev *pdev = hwif->pdev;

	struct hinic_pfhwdev *pfhwdev;

	unsigned long end;

	u16 out_size;

	int err;



	if (!HINIC_IS_PF(hwif) && !HINIC_IS_PPF(hwif)) {

		dev_err(&pdev->dev, "Unsupported PCI Function type\n");

		return -EINVAL;

	}



	pfhwdev = container_of(hwdev, struct hinic_pfhwdev, hwdev);



	cmd_io_status.func_idx = HINIC_HWIF_FUNC_IDX(hwif);



	end = jiffies + msecs_to_jiffies(IO_STATUS_TIMEOUT);

	do {

		err = hinic_msg_to_mgmt(&pfhwdev->pf_to_mgmt, HINIC_MOD_COMM,

					HINIC_COMM_CMD_IO_STATUS_GET,

					&cmd_io_status, sizeof(cmd_io_status),

					&cmd_io_status, &out_size,

					HINIC_MGMT_MSG_SYNC);

		if ((err) || (out_size != sizeof(cmd_io_status))) {

			dev_err(&pdev->dev, "Failed to get IO status, ret = %d\n",

				err);

			return err;

		}



		if (cmd_io_status.status == IO_STOPPED) {

			dev_info(&pdev->dev, "IO stopped\n");

			return 0;

		}



		msleep(20);

	} while (time_before(jiffies, end));



	dev_err(&pdev->dev, "Wait for IO stopped - Timeout\n");

	return -ETIMEDOUT;

}



/**

 * clear_io_resource - set the IO resources as not active in the NIC

 * @hwdev: the NIC HW device

 *

 * Return 0 - Success, negative - Failure

 **/

static int clear_io_resources(struct hinic_hwdev *hwdev)

{

	struct hinic_cmd_clear_io_res cmd_clear_io_res;

	struct hinic_hwif *hwif = hwdev->hwif;

	struct pci_dev *pdev = hwif->pdev;

	struct hinic_pfhwdev *pfhwdev;

	int err;



	if (!HINIC_IS_PF(hwif) && !HINIC_IS_PPF(hwif)) {

		dev_err(&pdev->dev, "Unsupported PCI Function type\n");

		return -EINVAL;

	}



	err = wait_for_io_stopped(hwdev);

	if (err) {

		dev_err(&pdev->dev, "IO has not stopped yet\n");

		return err;

	}



	cmd_clear_io_res.func_idx = HINIC_HWIF_FUNC_IDX(hwif);



	pfhwdev = container_of(hwdev, struct hinic_pfhwdev, hwdev);



	err = hinic_msg_to_mgmt(&pfhwdev->pf_to_mgmt, HINIC_MOD_COMM,

				HINIC_COMM_CMD_IO_RES_CLEAR, &cmd_clear_io_res,

				sizeof(cmd_clear_io_res), NULL, NULL,

				HINIC_MGMT_MSG_SYNC);

	if (err) {

		dev_err(&pdev->dev, "Failed to clear IO resources\n");

		return err;

	}



	return 0;

}



/**

 * set_resources_state - set the state of the resources in the NIC

 * @hwdev: the NIC HW device

 * @state: the state to set

 *

 * Return 0 - Success, negative - Failure

 **/

static int set_resources_state(struct hinic_hwdev *hwdev,

			       enum hinic_res_state state)

{

	struct hinic_cmd_set_res_state res_state;

	struct hinic_hwif *hwif = hwdev->hwif;

	struct pci_dev *pdev = hwif->pdev;

	struct hinic_pfhwdev *pfhwdev;



	if (!HINIC_IS_PF(hwif) && !HINIC_IS_PPF(hwif)) {

		dev_err(&pdev->dev, "Unsupported PCI Function type\n");

		return -EINVAL;

	}



	res_state.func_idx = HINIC_HWIF_FUNC_IDX(hwif);

	res_state.state = state;



	pfhwdev = container_of(hwdev, struct hinic_pfhwdev, hwdev);



	return hinic_msg_to_mgmt(&pfhwdev->pf_to_mgmt,

				 HINIC_MOD_COMM,

				 HINIC_COMM_CMD_RES_STATE_SET,

				 &res_state, sizeof(res_state), NULL,

				 NULL, HINIC_MGMT_MSG_SYNC);

}



/**

 * get_base_qpn - get the first qp number

 * @hwdev: the NIC HW device
@@ -312,8 +599,23 @@ int hinic_hwdev_ifup(struct hinic_hwdev *hwdev) 
		goto err_create_qps;

	}



	err = wait_for_db_state(hwdev);

	if (err) {

		dev_warn(&pdev->dev, "db - disabled, try again\n");

		hinic_db_state_set(hwif, HINIC_DB_ENABLE);

	}



	err = set_hw_ioctxt(hwdev, HINIC_SQ_DEPTH, HINIC_RQ_DEPTH);

	if (err) {

		dev_err(&pdev->dev, "Failed to set HW IO ctxt\n");

		goto err_hw_ioctxt;

	}



	return 0;



err_hw_ioctxt:

	hinic_io_destroy_qps(func_to_io, num_qps);



err_create_qps:

	hinic_io_free(func_to_io);

	return err;
@@ -329,6 +631,8 @@ void hinic_hwdev_ifdown(struct hinic_hwdev *hwdev) 
	struct hinic_func_to_io *func_to_io = &hwdev->func_to_io;

	struct hinic_cap *nic_cap = &hwdev->nic_cap;



	clear_io_resources(hwdev);



	hinic_io_destroy_qps(func_to_io, nic_cap->num_qps);

	hinic_io_free(func_to_io);

}
@@ -532,6 +836,12 @@ struct hinic_hwdev *hinic_init_hwdev(struct pci_dev *pdev) 
		goto err_init_msix;

	}



	err = wait_for_outbound_state(hwdev);

	if (err) {

		dev_warn(&pdev->dev, "outbound - disabled, try again\n");

		hinic_outbound_state_set(hwif, HINIC_OUTBOUND_ENABLE);

	}



	num_aeqs = HINIC_HWIF_NUM_AEQS(hwif);



	err = hinic_aeqs_init(&hwdev->aeqs, hwif, num_aeqs,
@@ -554,8 +864,22 @@ struct hinic_hwdev *hinic_init_hwdev(struct pci_dev *pdev) 
		goto err_dev_cap;

	}



	err = init_fw_ctxt(hwdev);

	if (err) {

		dev_err(&pdev->dev, "Failed to init function table\n");

		goto err_init_fw_ctxt;

	}



	err = set_resources_state(hwdev, HINIC_RES_ACTIVE);

	if (err) {

		dev_err(&pdev->dev, "Failed to set resources state\n");

		goto err_resources_state;

	}



	return hwdev;



err_resources_state:

err_init_fw_ctxt:

err_dev_cap:

	free_pfhwdev(pfhwdev);
@@ -582,6 +906,8 @@ void hinic_free_hwdev(struct hinic_hwdev *hwdev) 
						     struct hinic_pfhwdev,

						     hwdev);



	set_resources_state(hwdev, HINIC_RES_CLEAN);



	free_pfhwdev(pfhwdev);



	hinic_aeqs_free(&hwdev->aeqs);
@@ -639,3 +965,38 @@ struct hinic_rq *hinic_hwdev_get_rq(struct hinic_hwdev *hwdev, int i) 


	return &qp->rq;

}



/**

 * hinic_hwdev_msix_cnt_set - clear message attribute counters for msix entry

 * @hwdev: the NIC HW device

 * @msix_index: msix_index

 *

 * Return 0 - Success, negative - Failure

 **/

int hinic_hwdev_msix_cnt_set(struct hinic_hwdev *hwdev, u16 msix_index)

{

	return hinic_msix_attr_cnt_clear(hwdev->hwif, msix_index);

}



/**

 * hinic_hwdev_msix_set - set message attribute for msix entry

 * @hwdev: the NIC HW device

 * @msix_index: msix_index

 * @pending_limit: the maximum pending interrupt events (unit 8)

 * @coalesc_timer: coalesc period for interrupt (unit 8 us)

 * @lli_timer: replenishing period for low latency credit (unit 8 us)

 * @lli_credit_limit: maximum credits for low latency msix messages (unit 8)

 * @resend_timer: maximum wait for resending msix (unit coalesc period)

 *

 * Return 0 - Success, negative - Failure

 **/

int hinic_hwdev_msix_set(struct hinic_hwdev *hwdev, u16 msix_index,

			 u8 pending_limit, u8 coalesc_timer,

			 u8 lli_timer_cfg, u8 lli_credit_limit,

			 u8 resend_timer)

{

	return hinic_msix_attr_set(hwdev->hwif, msix_index,

				   pending_limit, coalesc_timer,

				   lli_timer_cfg, lli_credit_limit,

				   resend_timer);

}

drivers/net/ethernet/huawei/hinic/hinic_hw_dev.h

+77 −0
Original line number Diff line number Diff line
@@ -74,6 +74,76 @@ enum hinic_cb_state { 
	HINIC_CB_RUNNING = BIT(1),

};



enum hinic_res_state {

	HINIC_RES_CLEAN         = 0,

	HINIC_RES_ACTIVE        = 1,

};



struct hinic_cmd_fw_ctxt {

	u8      status;

	u8      version;

	u8      rsvd0[6];



	u16     func_idx;

	u16     rx_buf_sz;



	u32     rsvd1;

};



struct hinic_cmd_hw_ioctxt {

	u8      status;

	u8      version;

	u8      rsvd0[6];



	u16     func_idx;



	u16     rsvd1;



	u8      set_cmdq_depth;

	u8      cmdq_depth;



	u8      rsvd2;

	u8      rsvd3;

	u8      rsvd4;

	u8      rsvd5;



	u16     rq_depth;

	u16     rx_buf_sz_idx;

	u16     sq_depth;

};



struct hinic_cmd_io_status {

	u8      status;

	u8      version;

	u8      rsvd0[6];



	u16     func_idx;

	u8      rsvd1;

	u8      rsvd2;

	u32     io_status;

};



struct hinic_cmd_clear_io_res {

	u8      status;

	u8      version;

	u8      rsvd0[6];



	u16     func_idx;

	u8      rsvd1;

	u8      rsvd2;

};



struct hinic_cmd_set_res_state {

	u8      status;

	u8      version;

	u8      rsvd0[6];



	u16     func_idx;

	u8      state;

	u8      rsvd1;

	u32     rsvd2;

};



struct hinic_cmd_base_qpn {

	u8      status;

	u8      version;
@@ -137,4 +207,11 @@ struct hinic_sq *hinic_hwdev_get_sq(struct hinic_hwdev *hwdev, int i); 


struct hinic_rq *hinic_hwdev_get_rq(struct hinic_hwdev *hwdev, int i);



int hinic_hwdev_msix_cnt_set(struct hinic_hwdev *hwdev, u16 msix_index);



int hinic_hwdev_msix_set(struct hinic_hwdev *hwdev, u16 msix_index,

			 u8 pending_limit, u8 coalesc_timer,

			 u8 lli_timer_cfg, u8 lli_credit_limit,

			 u8 resend_timer);



#endif

drivers/net/ethernet/huawei/hinic/hinic_hw_if.c

+36 −0
Original line number Diff line number Diff line
@@ -132,6 +132,42 @@ void hinic_set_pf_action(struct hinic_hwif *hwif, enum hinic_pf_action action) 
	hinic_hwif_write_reg(hwif, HINIC_CSR_FUNC_ATTR5_ADDR, attr5);

}



enum hinic_outbound_state hinic_outbound_state_get(struct hinic_hwif *hwif)

{

	u32 attr4 = hinic_hwif_read_reg(hwif, HINIC_CSR_FUNC_ATTR4_ADDR);



	return HINIC_FA4_GET(attr4, OUTBOUND_STATE);

}



void hinic_outbound_state_set(struct hinic_hwif *hwif,

			      enum hinic_outbound_state outbound_state)

{

	u32 attr4 = hinic_hwif_read_reg(hwif, HINIC_CSR_FUNC_ATTR4_ADDR);



	attr4 = HINIC_FA4_CLEAR(attr4, OUTBOUND_STATE);

	attr4 |= HINIC_FA4_SET(outbound_state, OUTBOUND_STATE);



	hinic_hwif_write_reg(hwif, HINIC_CSR_FUNC_ATTR4_ADDR, attr4);

}



enum hinic_db_state hinic_db_state_get(struct hinic_hwif *hwif)

{

	u32 attr4 = hinic_hwif_read_reg(hwif, HINIC_CSR_FUNC_ATTR4_ADDR);



	return HINIC_FA4_GET(attr4, DB_STATE);

}



void hinic_db_state_set(struct hinic_hwif *hwif,

			enum hinic_db_state db_state)

{

	u32 attr4 = hinic_hwif_read_reg(hwif, HINIC_CSR_FUNC_ATTR4_ADDR);



	attr4 = HINIC_FA4_CLEAR(attr4, DB_STATE);

	attr4 |= HINIC_FA4_SET(db_state, DB_STATE);



	hinic_hwif_write_reg(hwif, HINIC_CSR_FUNC_ATTR4_ADDR, attr4);

}



/**

 * hwif_ready - test if the HW is ready for use

 * @hwif: the HW interface of a pci function device