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Commit e1288cd7 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: (63 commits)
  ARM: PL08x: cleanup comments
  Update CONFIG_MD_RAID6_PQ to CONFIG_RAID6_PQ in drivers/dma/iop-adma.c
  ARM: PL08x: fix a warning
  Fix dmaengine_submit() return type
  dmaengine: at_hdmac: fix race while monitoring channel status
  dmaengine: at_hdmac: flags located in first descriptor
  dmaengine: at_hdmac: use subsys_initcall instead of module_init
  dmaengine: at_hdmac: no need set ACK in new descriptor
  dmaengine: at_hdmac: trivial add precision to unmapping comment
  dmaengine: at_hdmac: use dma_address to program DMA hardware
  pch_dma: support new device ML7213 IOH
  ARM: PL08x: prevent dma_set_runtime_config() reconfiguring memcpy channels
  ARM: PL08x: allow dma_set_runtime_config() to return errors
  ARM: PL08x: fix locking between prepare function and submit function
  ARM: PL08x: introduce 'phychan_hold' to hold on to physical channels
  ARM: PL08x: put txd's on the pending list in pl08x_tx_submit()
  ARM: PL08x: rename 'desc_list' as 'pend_list'
  ARM: PL08x: implement unmapping of memcpy buffers
  ARM: PL08x: store prep_* flags in async_tx structure
  ARM: PL08x: shrink srcbus/dstbus in txd structure
  ...
parents e78bf5e6 94ae8522
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+8 −0
Original line number Diff line number Diff line
@@ -13,6 +13,14 @@
#include <linux/workqueue.h>
#include <linux/interrupt.h>

/*
 * Maxium size for a single dma descriptor
 * Size is limited to 16 bits.
 * Size is in the units of addr-widths (1,2,4,8 bytes)
 * Larger transfers will be split up to multiple linked desc
 */
#define STEDMA40_MAX_SEG_SIZE 0xFFFF

/* dev types for memcpy */
#define STEDMA40_DEV_DST_MEMORY (-1)
#define	STEDMA40_DEV_SRC_MEMORY (-1)
+7 −2
Original line number Diff line number Diff line
@@ -200,11 +200,16 @@ config PL330_DMA
	  platform_data for a dma-pl330 device.

config PCH_DMA
	tristate "Topcliff (Intel EG20T) PCH DMA support"
	tristate "Intel EG20T PCH / OKI SEMICONDUCTOR ML7213 IOH DMA support"
	depends on PCI && X86
	select DMA_ENGINE
	help
	  Enable support for the Topcliff (Intel EG20T) PCH DMA engine.
	  Enable support for Intel EG20T PCH DMA engine.

	  This driver also can be used for OKI SEMICONDUCTOR ML7213 IOH(Input/
	  Output Hub) which is for IVI(In-Vehicle Infotainment) use.
	  ML7213 is companion chip for Intel Atom E6xx series.
	  ML7213 is completely compatible for Intel EG20T PCH.

config IMX_SDMA
	tristate "i.MX SDMA support"
+533 −635

File changed.

Preview size limit exceeded, changes collapsed.

+9 −10
Original line number Diff line number Diff line
@@ -253,7 +253,7 @@ atc_chain_complete(struct at_dma_chan *atchan, struct at_desc *desc)
	/* move myself to free_list */
	list_move(&desc->desc_node, &atchan->free_list);

	/* unmap dma addresses */
	/* unmap dma addresses (not on slave channels) */
	if (!atchan->chan_common.private) {
		struct device *parent = chan2parent(&atchan->chan_common);
		if (!(txd->flags & DMA_COMPL_SKIP_DEST_UNMAP)) {
@@ -583,7 +583,6 @@ atc_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
		desc->lli.ctrlb = ctrlb;

		desc->txd.cookie = 0;
		async_tx_ack(&desc->txd);

		if (!first) {
			first = desc;
@@ -604,7 +603,7 @@ atc_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
	/* set end-of-link to the last link descriptor of list*/
	set_desc_eol(desc);

	desc->txd.flags = flags; /* client is in control of this ack */
	first->txd.flags = flags; /* client is in control of this ack */

	return &first->txd;

@@ -670,7 +669,7 @@ atc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
			if (!desc)
				goto err_desc_get;

			mem = sg_phys(sg);
			mem = sg_dma_address(sg);
			len = sg_dma_len(sg);
			mem_width = 2;
			if (unlikely(mem & 3 || len & 3))
@@ -712,7 +711,7 @@ atc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
			if (!desc)
				goto err_desc_get;

			mem = sg_phys(sg);
			mem = sg_dma_address(sg);
			len = sg_dma_len(sg);
			mem_width = 2;
			if (unlikely(mem & 3 || len & 3))
@@ -749,8 +748,8 @@ atc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
	first->txd.cookie = -EBUSY;
	first->len = total_len;

	/* last link descriptor of list is responsible of flags */
	prev->txd.flags = flags; /* client is in control of this ack */
	/* first link descriptor of list is responsible of flags */
	first->txd.flags = flags; /* client is in control of this ack */

	return &first->txd;

@@ -854,11 +853,11 @@ static void atc_issue_pending(struct dma_chan *chan)

	dev_vdbg(chan2dev(chan), "issue_pending\n");

	if (!atc_chan_is_enabled(atchan)) {
	spin_lock_bh(&atchan->lock);
	if (!atc_chan_is_enabled(atchan)) {
		atc_advance_work(atchan);
		spin_unlock_bh(&atchan->lock);
	}
	spin_unlock_bh(&atchan->lock);
}

/**
@@ -1210,7 +1209,7 @@ static int __init at_dma_init(void)
{
	return platform_driver_probe(&at_dma_driver, at_dma_probe);
}
module_init(at_dma_init);
subsys_initcall(at_dma_init);

static void __exit at_dma_exit(void)
{
+3 −1
Original line number Diff line number Diff line
/*
 * Freescale MPC85xx, MPC83xx DMA Engine support
 *
 * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
 * Copyright (C) 2007-2010 Freescale Semiconductor, Inc. All rights reserved.
 *
 * Author:
 *   Zhang Wei <wei.zhang@freescale.com>, Jul 2007
@@ -1324,6 +1324,8 @@ static int __devinit fsldma_of_probe(struct platform_device *op,
	fdev->common.device_control = fsl_dma_device_control;
	fdev->common.dev = &op->dev;

	dma_set_mask(&(op->dev), DMA_BIT_MASK(36));

	dev_set_drvdata(&op->dev, fdev);

	/*
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