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Commit e0cd2447 authored by Trishansh Bhardwaj's avatar Trishansh Bhardwaj
Browse files

ARM: dts: msm: camera: Merge kmd 3.1 changes in kmd 4.0

ARM: dts: msm: Fix custom gpio tables for bengal
ARM: dts: msm: Fix svs clock level for bengal
ARM: dts: msm: camera: Add required clocks to tpg and cpas node
ARM: dts: msm: camera: cpas: Add constituent paths for OPE
ARM: dts: msm: Fix the reset gpio for rear aux camera
ARM: dts: msm: Fix orientation of camera sensors
ARM: dts: msm: camera: cci: Add cci version
ARM: dts: msm: camera: cpas: Add camera fuse support
ARM: dts: msm: camera: smmu: Fix camera SID issue
ARM: dts: msm: camera: Add support to Cx Ipeak
ARM: dts: msm: Fix orientation of front camera
ARM: dts: msm: Add support to discard a region in dma space
ARM: dts: msm: camera: Correct the clock rates for all modules
ARM: dts: msm: Fix inverted image on front camera
ARM: dts: msm: Add CAMNOC nodes in lagoon camera dtsi
ARM: dts: msm: camera: Update fifo depth for OPE CDM
ARM: dts: msm: Change the vdig voltage of bengal front camera
ARM: dts: msm: Change the vdig voltage of bengal front camera
ARM: dts: msm: camera: ope: Change BL fifo depth
ARM: dts: msm: Add camera sensor nodes in MTP/CDP for lagoon
ARM: dts: msm: Update clock header for lagoon
ARM: dts: msm: Add csiphy and cci nodes in lagoon camera DT
ARM: dts: msm: Change IPE Write port, IPE clock source for lagoon camera
ARM: dts: msm: Change CSID and VFE interrupt name for lagoon camera
ARM: dts: msm: Add csiphy3 and cci1 clients to cpas
ARM: dts: msm: Add support for Scuba camera
ARM: dts: msm: Fix Bus and TFE nodes in Scuba camera
ARM: dts: msm: Add cci and csiphy support for Scuba camera
ARM: dts: msm: Fix the phy regulator voltage
ARM: dts: msm: Add Camera Sensor nodes for IDP/IDPS for scuba
ARM: dts: msm: Update GPU Mitigation
ARM: dts: msm: Fix compilation issue for scuba-camera-sensor-idp
ARM: dts: msm: camera: cpas: Disable secure feature mask
ARM: dts: msm: Update PHY version for bengal target
ARM: dts: msm: Remove fuse setting for secure camera.

CRs-Fixed: 2668666
Change-Id: I052654c8cc05043a63355ccd13582a87e993e42a
parent b37135cb
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+23 −15
Original line number Original line Diff line number Diff line
@@ -118,8 +118,8 @@
				&cam_sensor_rear1_reset_active>;
				&cam_sensor_rear1_reset_active>;
		pinctrl-1 = <&cam_sensor_mclk1_suspend
		pinctrl-1 = <&cam_sensor_mclk1_suspend
				&cam_sensor_rear1_reset_suspend>;
				&cam_sensor_rear1_reset_suspend>;
		gpios = <&tlmm 19 0>,
		gpios = <&tlmm 21 0>,
			<&tlmm 21 0>;
			<&tlmm 19 0>;
		gpio-reset = <1>;
		gpio-reset = <1>;
		gpio-req-tbl-num = <0 1>;
		gpio-req-tbl-num = <0 1>;
		gpio-req-tbl-flags = <1 0>;
		gpio-req-tbl-flags = <1 0>;
@@ -145,8 +145,8 @@
			"cam_clk";
			"cam_clk";
		rgltr-cntrl-support;
		rgltr-cntrl-support;
		pwm-switch;
		pwm-switch;
		rgltr-min-voltage = <1800000 2800000 1056000 0>;
		rgltr-min-voltage = <1800000 2800000 1050000 0>;
		rgltr-max-voltage = <1800000 2800000 1056000 0>;
		rgltr-max-voltage = <1800000 2800000 1050000 0>;
		rgltr-load-current = <0 80000 105000 0>;
		rgltr-load-current = <0 80000 105000 0>;
		gpio-no-mux = <0>;
		gpio-no-mux = <0>;
		pinctrl-names = "cam_default", "cam_suspend";
		pinctrl-names = "cam_default", "cam_suspend";
@@ -211,7 +211,7 @@
		cell-index = <0>;
		cell-index = <0>;
		compatible = "qcom,cam-sensor";
		compatible = "qcom,cam-sensor";
		csiphy-sd-index = <0>;
		csiphy-sd-index = <0>;
		sensor-position-roll = <90>;
		sensor-position-roll = <270>;
		sensor-position-pitch = <0>;
		sensor-position-pitch = <0>;
		sensor-position-yaw = <180>;
		sensor-position-yaw = <180>;
		actuator-src = <&actuator_rear>;
		actuator-src = <&actuator_rear>;
@@ -255,7 +255,7 @@
		cell-index = <1>;
		cell-index = <1>;
		compatible = "qcom,cam-sensor";
		compatible = "qcom,cam-sensor";
		csiphy-sd-index = <1>;
		csiphy-sd-index = <1>;
		sensor-position-roll = <90>;
		sensor-position-roll = <270>;
		sensor-position-pitch = <0>;
		sensor-position-pitch = <0>;
		sensor-position-yaw = <180>;
		sensor-position-yaw = <180>;
		actuator-src = <&actuator_rear_aux>;
		actuator-src = <&actuator_rear_aux>;
@@ -278,8 +278,8 @@
				&cam_sensor_rear1_reset_active>;
				&cam_sensor_rear1_reset_active>;
		pinctrl-1 = <&cam_sensor_mclk1_suspend
		pinctrl-1 = <&cam_sensor_mclk1_suspend
				&cam_sensor_rear1_reset_suspend>;
				&cam_sensor_rear1_reset_suspend>;
		gpios = <&tlmm 19 0>,
		gpios = <&tlmm 21 0>,
			<&tlmm 21 0>;
			<&tlmm 19 0>;
		gpio-reset = <1>;
		gpio-reset = <1>;
		gpio-req-tbl-num = <0 1>;
		gpio-req-tbl-num = <0 1>;
		gpio-req-tbl-flags = <1 0>;
		gpio-req-tbl-flags = <1 0>;
@@ -299,9 +299,9 @@
		cell-index = <2>;
		cell-index = <2>;
		compatible = "qcom,cam-sensor";
		compatible = "qcom,cam-sensor";
		csiphy-sd-index = <2>;
		csiphy-sd-index = <2>;
		sensor-position-roll = <90>;
		sensor-position-roll = <270>;
		sensor-position-pitch = <0>;
		sensor-position-pitch = <0>;
		sensor-position-yaw = <180>;
		sensor-position-yaw = <0>;
		eeprom-src = <&eeprom_front>;
		eeprom-src = <&eeprom_front>;
		cam_vio-supply = <&L7P>;
		cam_vio-supply = <&L7P>;
		cam_vana-supply = <&L6P>;
		cam_vana-supply = <&L6P>;
@@ -311,8 +311,8 @@
			"cam_clk";
			"cam_clk";
		rgltr-cntrl-support;
		rgltr-cntrl-support;
		pwm-switch;
		pwm-switch;
		rgltr-min-voltage = <1800000 2800000 1056000 0>;
		rgltr-min-voltage = <1800000 2800000 1050000 0>;
		rgltr-max-voltage = <1800000 2800000 1056000 0>;
		rgltr-max-voltage = <1800000 2800000 1050000 0>;
		rgltr-load-current = <0 80000 105000 0>;
		rgltr-load-current = <0 80000 105000 0>;
		gpio-no-mux = <0>;
		gpio-no-mux = <0>;
		pinctrl-names = "cam_default", "cam_suspend";
		pinctrl-names = "cam_default", "cam_suspend";
@@ -329,10 +329,14 @@
			<&tlmm 66 0>,
			<&tlmm 66 0>,
			<&tlmm 67 0>;
			<&tlmm 67 0>;
		gpio-reset = <1>;
		gpio-reset = <1>;
		gpio-custom1 = <2>;
		gpio-custom2 = <3>;
		gpio-req-tbl-num = <0 1>;
		gpio-req-tbl-num = <0 1>;
		gpio-req-tbl-flags = <1 0>;
		gpio-req-tbl-flags = <1 0>;
		gpio-req-tbl-label = "CAMIF_MCLK2",
		gpio-req-tbl-label = "CAMIF_MCLK2",
					"CAM_RESET2";
					"CAM_RESET2",
					"CAM_CSIMUX_OE0",
					"CAM_CSIMUX_SEL0";
		sensor-mode = <0>;
		sensor-mode = <0>;
		cci-master = <1>;
		cci-master = <1>;
		status = "ok";
		status = "ok";
@@ -347,7 +351,7 @@
		cell-index = <3>;
		cell-index = <3>;
		compatible = "qcom,cam-sensor";
		compatible = "qcom,cam-sensor";
		csiphy-sd-index = <2>;
		csiphy-sd-index = <2>;
		sensor-position-roll = <90>;
		sensor-position-roll = <270>;
		sensor-position-pitch = <0>;
		sensor-position-pitch = <0>;
		sensor-position-yaw = <180>;
		sensor-position-yaw = <180>;
		led-flash-src = <&led_flash_rear_aux2>;
		led-flash-src = <&led_flash_rear_aux2>;
@@ -378,10 +382,14 @@
			<&tlmm 66 0>,
			<&tlmm 66 0>,
			<&tlmm 67 0>;
			<&tlmm 67 0>;
		gpio-reset = <1>;
		gpio-reset = <1>;
		gpio-custom1 = <2>;
		gpio-custom2 = <3>;
		gpio-req-tbl-num = <0 1>;
		gpio-req-tbl-num = <0 1>;
		gpio-req-tbl-flags = <1 0>;
		gpio-req-tbl-flags = <1 0>;
		gpio-req-tbl-label = "CAMIF_MCLK3",
		gpio-req-tbl-label = "CAMIF_MCLK3",
					"CAM_RESET3";
					"CAM_RESET3",
					"CAM_CSIMUX_OE1",
					"CAM_CSIMUX_SEL1";
		sensor-mode = <0>;
		sensor-mode = <0>;
		cci-master = <0>;
		cci-master = <0>;
		status = "ok";
		status = "ok";
+5 −5
Original line number Original line Diff line number Diff line
@@ -145,8 +145,8 @@
			"cam_clk";
			"cam_clk";
		rgltr-cntrl-support;
		rgltr-cntrl-support;
		pwm-switch;
		pwm-switch;
		rgltr-min-voltage = <1800000 2800000 1056000 0>;
		rgltr-min-voltage = <1800000 2800000 1050000 0>;
		rgltr-max-voltage = <1800000 2800000 1056000 0>;
		rgltr-max-voltage = <1800000 2800000 1050000 0>;
		rgltr-load-current = <0 80000 105000 0>;
		rgltr-load-current = <0 80000 105000 0>;
		gpio-no-mux = <0>;
		gpio-no-mux = <0>;
		pinctrl-names = "cam_default", "cam_suspend";
		pinctrl-names = "cam_default", "cam_suspend";
@@ -301,7 +301,7 @@
		cell-index = <2>;
		cell-index = <2>;
		compatible = "qcom,cam-sensor";
		compatible = "qcom,cam-sensor";
		csiphy-sd-index = <2>;
		csiphy-sd-index = <2>;
		sensor-position-roll = <90>;
		sensor-position-roll = <270>;
		sensor-position-pitch = <0>;
		sensor-position-pitch = <0>;
		sensor-position-yaw = <0>;
		sensor-position-yaw = <0>;
		eeprom-src = <&eeprom_front>;
		eeprom-src = <&eeprom_front>;
@@ -313,8 +313,8 @@
			"cam_clk";
			"cam_clk";
		rgltr-cntrl-support;
		rgltr-cntrl-support;
		pwm-switch;
		pwm-switch;
		rgltr-min-voltage = <1800000 2800000 1056000 0>;
		rgltr-min-voltage = <1800000 2800000 1050000 0>;
		rgltr-max-voltage = <1800000 2800000 1056000 0>;
		rgltr-max-voltage = <1800000 2800000 1050000 0>;
		rgltr-load-current = <0 80000 105000 0>;
		rgltr-load-current = <0 80000 105000 0>;
		gpio-no-mux = <0>;
		gpio-no-mux = <0>;
		pinctrl-names = "cam_default", "cam_suspend";
		pinctrl-names = "cam_default", "cam_suspend";
+95 −85
Original line number Original line Diff line number Diff line
@@ -8,7 +8,7 @@


	cam_csiphy0: qcom,csiphy0 {
	cam_csiphy0: qcom,csiphy0 {
		cell-index = <0>;
		cell-index = <0>;
		compatible = "qcom,csiphy-v2.0", "qcom,csiphy";
		compatible = "qcom,csiphy-v2.0.1", "qcom,csiphy";
		reg = <0x05C52000 0x1000>;
		reg = <0x05C52000 0x1000>;
		reg-names = "csiphy";
		reg-names = "csiphy";
		reg-cam-base = <0x52000>;
		reg-cam-base = <0x52000>;
@@ -30,15 +30,16 @@
		clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo";
		clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo";
		clock-rates =
		clock-rates =
			<19200000  0 19200000 0>,
			<19200000  0 19200000 0>,
			<341330000 0 200000000 0>,
			<240000000 0 200000000 0>,
			<341330000 0 200000000 0>,
			<341330000 0 200000000 0>,
			<384000000 0 268800000 0>;
			<384000000 0 268800000 0>;
		qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>;
		status = "ok";
		status = "ok";
	};
	};


	cam_csiphy1: qcom,csiphy1 {
	cam_csiphy1: qcom,csiphy1 {
		cell-index = <1>;
		cell-index = <1>;
		compatible = "qcom,csiphy-v2.0", "qcom,csiphy";
		compatible = "qcom,csiphy-v2.0.1", "qcom,csiphy";
		reg = <0x05C53000 0x1000>;
		reg = <0x05C53000 0x1000>;
		reg-names = "csiphy";
		reg-names = "csiphy";
		reg-cam-base = <0x53000>;
		reg-cam-base = <0x53000>;
@@ -60,15 +61,16 @@
		clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo";
		clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo";
		clock-rates =
		clock-rates =
			<19200000  0 19200000 0>,
			<19200000  0 19200000 0>,
			<341330000 0 200000000 0>,
			<240000000 0 200000000 0>,
			<341330000 0 200000000 0>,
			<341330000 0 200000000 0>,
			<384000000 0 268800000 0>;
			<384000000 0 268800000 0>;
		qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>;
		status = "ok";
		status = "ok";
	};
	};


	cam_csiphy2: qcom,csiphy2 {
	cam_csiphy2: qcom,csiphy2 {
		cell-index = <2>;
		cell-index = <2>;
		compatible = "qcom,csiphy-v2.0", "qcom,csiphy";
		compatible = "qcom,csiphy-v2.0.1", "qcom,csiphy";
		reg = <0x05C54000 0x1000>;
		reg = <0x05C54000 0x1000>;
		reg-names = "csiphy";
		reg-names = "csiphy";
		reg-cam-base = <0x54000>;
		reg-cam-base = <0x54000>;
@@ -90,15 +92,16 @@
		clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo";
		clock-cntl-level = "lowsvs", "svs", "svs_l1", "turbo";
		clock-rates =
		clock-rates =
			<19200000  0 19200000 0>,
			<19200000  0 19200000 0>,
			<341330000 0 200000000 0>,
			<240000000 0 200000000 0>,
			<341330000 0 200000000 0>,
			<341330000 0 200000000 0>,
			<384000000 0 268800000 0>;
			<384000000 0 268800000 0>;
		qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>;
		status = "ok";
		status = "ok";
	};
	};


	cam_cci0: qcom,cci0 {
	cam_cci0: qcom,cci0 {
		cell-index = <0>;
		cell-index = <0>;
		compatible = "qcom,cci", "simple-bus";
		compatible = "qcom,cci-v1.2", "qcom,cci", "simple-bus";
		#address-cells = <1>;
		#address-cells = <1>;
		#size-cells = <0>;
		#size-cells = <0>;
		reg = <0x05C1B000 0x1000>;
		reg = <0x05C1B000 0x1000>;
@@ -197,8 +200,7 @@


		msm_cam_smmu_tfe {
		msm_cam_smmu_tfe {
			compatible = "qcom,msm-cam-smmu-cb";
			compatible = "qcom,msm-cam-smmu-cb";
			iommus = <&apps_smmu 0x400 0x000>,
			iommus = <&apps_smmu 0x400 0x000>;
				<&apps_smmu 0x401 0x000>;
			qcom,iommu-faults = "non-fatal";
			qcom,iommu-faults = "non-fatal";
			qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>;
			qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>;
			label = "tfe";
			label = "tfe";
@@ -217,9 +219,7 @@
		msm_cam_smmu_ope {
		msm_cam_smmu_ope {
			compatible = "qcom,msm-cam-smmu-cb";
			compatible = "qcom,msm-cam-smmu-cb";
			iommus = <&apps_smmu 0x820 0x000>,
			iommus = <&apps_smmu 0x820 0x000>,
				<&apps_smmu 0x821 0x020>,
				<&apps_smmu 0x840 0x000>;
				<&apps_smmu 0x840 0x000>,
				<&apps_smmu 0x841 0x000>;
			qcom,iommu-faults = "non-fatal";
			qcom,iommu-faults = "non-fatal";
			multiple-client-devices;
			multiple-client-devices;
			qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>;
			qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>;
@@ -238,8 +238,7 @@


		msm_cam_smmu_cpas_cdm {
		msm_cam_smmu_cpas_cdm {
			compatible = "qcom,msm-cam-smmu-cb";
			compatible = "qcom,msm-cam-smmu-cb";
			iommus = <&apps_smmu 0x800 0x000>,
			iommus = <&apps_smmu 0x800 0x000>;
				<&apps_smmu 0x801 0x020>;
			label = "cpas-cdm0";
			label = "cpas-cdm0";
			qcom,iommu-faults = "non-fatal";
			qcom,iommu-faults = "non-fatal";
			qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>;
			qcom,iommu-dma-addr-pool = <0x7400000 0xd8c00000>;
@@ -283,37 +282,42 @@
			"gcc_camss_top_ahb_clk",
			"gcc_camss_top_ahb_clk",
			"gcc_camss_top_ahb_clk_src",
			"gcc_camss_top_ahb_clk_src",
			"gcc_camss_axi_clk",
			"gcc_camss_axi_clk",
			"gcc_camss_axi_clk_src";
			"gcc_camss_axi_clk_src",
			"gcc_camss_nrt_axi_clk",
			"gcc_camss_rt_axi_clk";
		clocks =
		clocks =
			<&gcc GCC_CAMERA_AHB_CLK>,
			<&gcc GCC_CAMERA_AHB_CLK>,
			<&gcc GCC_CAMSS_TOP_AHB_CLK>,
			<&gcc GCC_CAMSS_TOP_AHB_CLK>,
			<&gcc GCC_CAMSS_TOP_AHB_CLK_SRC>,
			<&gcc GCC_CAMSS_TOP_AHB_CLK_SRC>,
			<&gcc GCC_CAMSS_AXI_CLK>,
			<&gcc GCC_CAMSS_AXI_CLK>,
			<&gcc GCC_CAMSS_AXI_CLK_SRC>;
			<&gcc GCC_CAMSS_AXI_CLK_SRC>,
			<&gcc GCC_CAMSS_NRT_AXI_CLK>,
			<&gcc GCC_CAMSS_RT_AXI_CLK>;
		src-clock-name = "gcc_camss_axi_clk_src";
		src-clock-name = "gcc_camss_axi_clk_src";
		clock-rates =
		clock-rates =
			<0        0        0         0         0>,
			<0 0        0 0         0 0 0>,
			<0 80000000 80000000  19200000  19200000>,
			<0 0 80000000 0  19200000 0 0>,
			<0 80000000 80000000 150000000 150000000>,
			<0 0 80000000 0 150000000 0 0>,
			<0 80000000 80000000 200000000 200000000>,
			<0 0 80000000 0 200000000 0 0>,
			<0 80000000 80000000 300000000 300000000>,
			<0 0 80000000 0 300000000 0 0>,
			<0 80000000 80000000 300000000 300000000>,
			<0 0 80000000 0 300000000 0 0>,
			<0 80000000 80000000 300000000 300000000>;
			<0 0 80000000 0 300000000 0 0>;
		clock-cntl-level = "suspend", "minsvs", "lowsvs", "svs",
		clock-cntl-level = "suspend", "minsvs", "lowsvs", "svs",
			"svs_l1", "nominal", "turbo";
			"svs_l1", "nominal", "turbo";
		qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>;
		control-camnoc-axi-clk;
		control-camnoc-axi-clk;
		camnoc-bus-width = <32>;
		camnoc-bus-width = <32>;
		camnoc-axi-clk-bw-margin-perc = <20>;
		camnoc-axi-clk-bw-margin-perc = <20>;
		qcom,msm-bus,name = "cam_ahb"; /*Need to verify*/
		qcom,msm-bus,name = "cam_ahb";
		qcom,msm-bus,num-cases = <7>; /*Need to verify*/
		qcom,msm-bus,num-cases = <7>;
		qcom,msm-bus,num-paths = <1>; /*Need to verify*/
		qcom,msm-bus,num-paths = <1>;
		qcom,msm-bus,vectors-KBps = /*Need to verify*/
		qcom,msm-bus,vectors-KBps =
			<MSM_BUS_MASTER_AMPSS_M0
			<MSM_BUS_MASTER_AMPSS_M0
			MSM_BUS_SLAVE_CAMERA_CFG 0 0>,
			MSM_BUS_SLAVE_CAMERA_CFG 0 0>,
			<MSM_BUS_MASTER_AMPSS_M0
			<MSM_BUS_MASTER_AMPSS_M0
			MSM_BUS_SLAVE_CAMERA_CFG 0 76800>,
			MSM_BUS_SLAVE_CAMERA_CFG 0 133333>,
			<MSM_BUS_MASTER_AMPSS_M0
			<MSM_BUS_MASTER_AMPSS_M0
			MSM_BUS_SLAVE_CAMERA_CFG 0 76800>,
			MSM_BUS_SLAVE_CAMERA_CFG 0 133333>,
			<MSM_BUS_MASTER_AMPSS_M0
			<MSM_BUS_MASTER_AMPSS_M0
			MSM_BUS_SLAVE_CAMERA_CFG 0 150000>,
			MSM_BUS_SLAVE_CAMERA_CFG 0 150000>,
			<MSM_BUS_MASTER_AMPSS_M0
			<MSM_BUS_MASTER_AMPSS_M0
@@ -417,6 +421,10 @@
					traffic-data = <CAM_CPAS_PATH_DATA_ALL>;
					traffic-data = <CAM_CPAS_PATH_DATA_ALL>;
					traffic-transaction-type =
					traffic-transaction-type =
					<CAM_CPAS_TRANSACTION_WRITE>;
					<CAM_CPAS_TRANSACTION_WRITE>;
					constituent-paths =
						<CAM_CPAS_PATH_DATA_OPE_WR_VID
						CAM_CPAS_PATH_DATA_OPE_WR_DISP
						CAM_CPAS_PATH_DATA_OPE_WR_REF>;
					parent-node = <&level1_nrt0_rd_wr>;
					parent-node = <&level1_nrt0_rd_wr>;
				};
				};


@@ -427,6 +435,9 @@
					traffic-data = <CAM_CPAS_PATH_DATA_ALL>;
					traffic-data = <CAM_CPAS_PATH_DATA_ALL>;
					traffic-transaction-type =
					traffic-transaction-type =
					<CAM_CPAS_TRANSACTION_READ>;
					<CAM_CPAS_TRANSACTION_READ>;
					constituent-paths =
						<CAM_CPAS_PATH_DATA_OPE_RD_IN
						CAM_CPAS_PATH_DATA_OPE_RD_REF>;
					parent-node = <&level1_nrt0_rd_wr>;
					parent-node = <&level1_nrt0_rd_wr>;
				};
				};


@@ -591,23 +602,22 @@
			"cphy_rx_clk_src",
			"cphy_rx_clk_src",
			"tfe_cphy_rx_clk",
			"tfe_cphy_rx_clk",
			"tfe_clk_src",
			"tfe_clk_src",
			"tfe_clk",
			"tfe_clk";
			"tfe_axi_clk";
		clocks =
		clocks =
			<&gcc GCC_CAMSS_TFE_0_CSID_CLK_SRC>,
			<&gcc GCC_CAMSS_TFE_0_CSID_CLK_SRC>,
			<&gcc GCC_CAMSS_TFE_0_CSID_CLK>,
			<&gcc GCC_CAMSS_TFE_0_CSID_CLK>,
			<&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>,
			<&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>,
			<&gcc GCC_CAMSS_TFE_0_CPHY_RX_CLK>,
			<&gcc GCC_CAMSS_TFE_0_CPHY_RX_CLK>,
			<&gcc GCC_CAMSS_TFE_0_CLK_SRC>,
			<&gcc GCC_CAMSS_TFE_0_CLK_SRC>,
			<&gcc GCC_CAMSS_TFE_0_CLK>,
			<&gcc GCC_CAMSS_TFE_0_CLK>;
			<&gcc GCC_CAMSS_AXI_CLK>;
		clock-rates =
		clock-rates =
			<240000000 240000000 0 240000000 256000000 256000000 150000000>,
			<240000000 0 240000000 0 256000000 0>,
			<384000000 384000000 0 341333333 460800000 460800000 200000000>,
			<384000000 0 341333333 0 460800000 0>,
			<426400000 426400000 0 384000000 576000000 576000000 300000000>;
			<426400000 0 384000000 0 576000000 0>;
		clock-cntl-level = "svs", "svs_l1", "turbo";
		clock-cntl-level = "svs", "svs_l1", "turbo";
		src-clock-name = "tfe_csid_clk_src";
		src-clock-name = "tfe_csid_clk_src";
		clock-control-debugfs = "true";
		clock-control-debugfs = "true";
		qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>;
		status = "ok";
		status = "ok";
	};
	};


@@ -623,19 +633,18 @@
		camss-supply = <&gcc_camss_top_gdsc>;
		camss-supply = <&gcc_camss_top_gdsc>;
		clock-names =
		clock-names =
			"tfe_clk_src",
			"tfe_clk_src",
			"tfe_clk",
			"tfe_clk";
			"tfe_axi_clk";
		clocks =
		clocks =
			<&gcc GCC_CAMSS_TFE_0_CLK_SRC>,
			<&gcc GCC_CAMSS_TFE_0_CLK_SRC>,
			<&gcc GCC_CAMSS_TFE_0_CLK>,
			<&gcc GCC_CAMSS_TFE_0_CLK>;
			<&gcc GCC_CAMSS_AXI_CLK>;
		clock-rates =
		clock-rates =
			<256000000 256000000 150000000>,
			<256000000 0>,
			<460800000 460800000 200000000>,
			<460800000 0>,
			<576000000 576000000 300000000>;
			<576000000 0>;
		clock-cntl-level = "svs", "svs_l1", "turbo";
		clock-cntl-level = "svs", "svs_l1", "turbo";
		src-clock-name = "tfe_clk_src";
		src-clock-name = "tfe_clk_src";
		clock-control-debugfs = "true";
		clock-control-debugfs = "true";
		qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>;
		status = "ok";
		status = "ok";
	};
	};


@@ -657,23 +666,22 @@
			"cphy_rx_clk_src",
			"cphy_rx_clk_src",
			"tfe_cphy_rx_clk",
			"tfe_cphy_rx_clk",
			"tfe_clk_src",
			"tfe_clk_src",
			"tfe_clk",
			"tfe_clk";
			"tfe_axi_clk";
		clocks =
		clocks =
			<&gcc GCC_CAMSS_TFE_1_CSID_CLK_SRC>,
			<&gcc GCC_CAMSS_TFE_1_CSID_CLK_SRC>,
			<&gcc GCC_CAMSS_TFE_1_CSID_CLK>,
			<&gcc GCC_CAMSS_TFE_1_CSID_CLK>,
			<&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>,
			<&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>,
			<&gcc GCC_CAMSS_TFE_1_CPHY_RX_CLK>,
			<&gcc GCC_CAMSS_TFE_1_CPHY_RX_CLK>,
			<&gcc GCC_CAMSS_TFE_1_CLK_SRC>,
			<&gcc GCC_CAMSS_TFE_1_CLK_SRC>,
			<&gcc GCC_CAMSS_TFE_1_CLK>,
			<&gcc GCC_CAMSS_TFE_1_CLK>;
			<&gcc GCC_CAMSS_AXI_CLK>;
		clock-rates =
		clock-rates =
			<240000000 240000000 0 240000000 256000000 256000000 150000000>,
			<240000000 0 240000000 0 256000000 0>,
			<384000000 384000000 0 341333333 460800000 460800000 200000000>,
			<384000000 0 341333333 0 460800000 0>,
			<426400000 426400000 0 384000000 576000000 576000000 300000000>;
			<426400000 0 384000000 0 576000000 0>;
		clock-cntl-level = "svs", "svs_l1", "turbo";
		clock-cntl-level = "svs", "svs_l1", "turbo";
		src-clock-name = "tfe_csid_clk_src";
		src-clock-name = "tfe_csid_clk_src";
		clock-control-debugfs = "true";
		clock-control-debugfs = "true";
		qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>;
		status = "ok";
		status = "ok";
	};
	};


@@ -689,19 +697,18 @@
		camss-supply = <&gcc_camss_top_gdsc>;
		camss-supply = <&gcc_camss_top_gdsc>;
		clock-names =
		clock-names =
			"tfe_clk_src",
			"tfe_clk_src",
			"tfe_clk",
			"tfe_clk";
			"tfe_axi_clk";
		clocks =
		clocks =
			<&gcc GCC_CAMSS_TFE_1_CLK_SRC>,
			<&gcc GCC_CAMSS_TFE_1_CLK_SRC>,
			<&gcc GCC_CAMSS_TFE_1_CLK>,
			<&gcc GCC_CAMSS_TFE_1_CLK>;
			<&gcc GCC_CAMSS_AXI_CLK>;
		clock-rates =
		clock-rates =
			<256000000 256000000 150000000>,
			<256000000 0>,
			<460800000 460800000 200000000>,
			<460800000 0>,
			<576000000 576000000 300000000>;
			<576000000 0>;
		clock-cntl-level = "svs", "svs_l1", "turbo";
		clock-cntl-level = "svs", "svs_l1", "turbo";
		src-clock-name = "tfe_clk_src";
		src-clock-name = "tfe_clk_src";
		clock-control-debugfs = "true";
		clock-control-debugfs = "true";
		qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>;
		status = "ok";
		status = "ok";
	};
	};


@@ -723,23 +730,22 @@
			"cphy_rx_clk_src",
			"cphy_rx_clk_src",
			"tfe_cphy_rx_clk",
			"tfe_cphy_rx_clk",
			"tfe_clk_src",
			"tfe_clk_src",
			"tfe_clk",
			"tfe_clk";
			"tfe_axi_clk";
		clocks =
		clocks =
			<&gcc GCC_CAMSS_TFE_2_CSID_CLK_SRC>,
			<&gcc GCC_CAMSS_TFE_2_CSID_CLK_SRC>,
			<&gcc GCC_CAMSS_TFE_2_CSID_CLK>,
			<&gcc GCC_CAMSS_TFE_2_CSID_CLK>,
			<&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>,
			<&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>,
			<&gcc GCC_CAMSS_TFE_2_CPHY_RX_CLK>,
			<&gcc GCC_CAMSS_TFE_2_CPHY_RX_CLK>,
			<&gcc GCC_CAMSS_TFE_2_CLK_SRC>,
			<&gcc GCC_CAMSS_TFE_2_CLK_SRC>,
			<&gcc GCC_CAMSS_TFE_2_CLK>,
			<&gcc GCC_CAMSS_TFE_2_CLK>;
			<&gcc GCC_CAMSS_AXI_CLK>;
		clock-rates =
		clock-rates =
			<240000000 240000000 0 240000000 256000000 256000000 150000000>,
			<240000000 0 240000000 0 256000000 0>,
			<384000000 384000000 0 341333333 460800000 460800000 200000000>,
			<384000000 0 341333333 0 460800000 0>,
			<426400000 426400000 0 384000000 576000000 576000000 300000000>;
			<426400000 0 384000000 0 576000000 0>;
		clock-cntl-level = "svs", "svs_l1", "turbo";
		clock-cntl-level = "svs", "svs_l1", "turbo";
		src-clock-name = "tfe_csid_clk_src";
		src-clock-name = "tfe_csid_clk_src";
		clock-control-debugfs = "true";
		clock-control-debugfs = "true";
		qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>;
		status = "ok";
		status = "ok";
	};
	};


@@ -755,19 +761,18 @@
		camss-supply = <&gcc_camss_top_gdsc>;
		camss-supply = <&gcc_camss_top_gdsc>;
		clock-names =
		clock-names =
			"tfe_clk_src",
			"tfe_clk_src",
			"tfe_clk",
			"tfe_clk";
			"tfe_axi_clk";
		clocks =
		clocks =
			<&gcc GCC_CAMSS_TFE_2_CLK_SRC>,
			<&gcc GCC_CAMSS_TFE_2_CLK_SRC>,
			<&gcc GCC_CAMSS_TFE_2_CLK>,
			<&gcc GCC_CAMSS_TFE_2_CLK>;
			<&gcc GCC_CAMSS_AXI_CLK>;
		clock-rates =
		clock-rates =
			<256000000 256000000 150000000>,
			<256000000 0>,
			<460800000 460800000 200000000>,
			<460800000 0>,
			<576000000 576000000 300000000>;
			<576000000 0>;
		clock-cntl-level = "svs", "svs_l1", "turbo";
		clock-cntl-level = "svs", "svs_l1", "turbo";
		src-clock-name = "tfe_clk_src";
		src-clock-name = "tfe_clk_src";
		clock-control-debugfs = "true";
		clock-control-debugfs = "true";
		qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>;
		status = "ok";
		status = "ok";
	};
	};


@@ -782,14 +787,16 @@
		camss-supply = <&gcc_camss_top_gdsc>;
		camss-supply = <&gcc_camss_top_gdsc>;
		clock-names =
		clock-names =
			"cphy_rx_clk_src",
			"cphy_rx_clk_src",
			"tfe_0_cphy_rx_clk";
			"tfe_0_cphy_rx_clk",
			"gcc_camss_cphy_0_clk";
		clocks =
		clocks =
			<&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>,
			<&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>,
			<&gcc GCC_CAMSS_TFE_0_CPHY_RX_CLK>;
			<&gcc GCC_CAMSS_TFE_0_CPHY_RX_CLK>,
			<&gcc GCC_CAMSS_CPHY_0_CLK>;
		clock-rates =
		clock-rates =
			<240000000 240000000>,
			<240000000 0 0>,
			<341333333 341333333>,
			<341333333 0 0>,
			<384000000 384000000>;
			<384000000 0 0>;
		clock-cntl-level = "svs", "svs_l1", "turbo";
		clock-cntl-level = "svs", "svs_l1", "turbo";
		src-clock-name = "cphy_rx_clk_src";
		src-clock-name = "cphy_rx_clk_src";
		clock-control-debugfs = "false";
		clock-control-debugfs = "false";
@@ -807,14 +814,16 @@
		camss-supply = <&gcc_camss_top_gdsc>;
		camss-supply = <&gcc_camss_top_gdsc>;
		clock-names =
		clock-names =
			"cphy_rx_clk_src",
			"cphy_rx_clk_src",
			"tfe_1_cphy_rx_clk";
			"tfe_1_cphy_rx_clk",
			"gcc_camss_cphy_1_clk";
		clocks =
		clocks =
			<&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>,
			<&gcc GCC_CAMSS_TFE_CPHY_RX_CLK_SRC>,
			<&gcc GCC_CAMSS_TFE_1_CPHY_RX_CLK>;
			<&gcc GCC_CAMSS_TFE_1_CPHY_RX_CLK>,
			<&gcc GCC_CAMSS_CPHY_1_CLK>;
		clock-rates =
		clock-rates =
			<240000000 240000000>,
			<240000000 0 0>,
			<341333333 341333333>,
			<341333333 0 0>,
			<384000000 384000000>;
			<384000000 0 0>;
		clock-cntl-level = "svs", "svs_l1", "turbo";
		clock-cntl-level = "svs", "svs_l1", "turbo";
		src-clock-name = "cphy_rx_clk_src";
		src-clock-name = "cphy_rx_clk_src";
		clock-control-debugfs = "false";
		clock-control-debugfs = "false";
@@ -859,12 +868,13 @@
			<&gcc GCC_CAMSS_OPE_CLK_SRC>,
			<&gcc GCC_CAMSS_OPE_CLK_SRC>,
			<&gcc GCC_CAMSS_OPE_CLK>;
			<&gcc GCC_CAMSS_OPE_CLK>;
		clock-rates =
		clock-rates =
			<171428571 200000000 200000000>,
			<171428571 200000000 0>,
			<171428571 266600000 266600000>,
			<171428571 266600000 0>,
			<240000000 465000000 465000000>,
			<240000000 465000000 0>,
			<240000000 580000000 580000000>;
			<240000000 580000000 0>;
		clock-cntl-level = "svs", "svs_l1", "nominal", "turbo";
		clock-cntl-level = "svs", "svs_l1", "nominal", "turbo";
		src-clock-name = "ope_clk_src";
		src-clock-name = "ope_clk_src";
		qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>;
		status = "ok";
		status = "ok";
	};
	};
};
};
+2 −0
Original line number Original line Diff line number Diff line
@@ -19,6 +19,8 @@ First Level Node - CCI device
  Usage: required
  Usage: required
  Value type: <string>
  Value type: <string>
  Definition: Should be "qcom,cci".
  Definition: Should be "qcom,cci".
        In case of cci version 1.2,
        use "qcom,cci-v1.2".


- cell-index: cci hardware core index
- cell-index: cci hardware core index
  Usage: required
  Usage: required
+6 −0
Original line number Original line Diff line number Diff line
@@ -128,6 +128,11 @@ First Level Node - CAM CPAS device
  Definition: List of strings corresponds clock-rates levels.
  Definition: List of strings corresponds clock-rates levels.
  Supported strings: minsvs, lowsvs, svs, svs_l1, nominal, turbo.
  Supported strings: minsvs, lowsvs, svs, svs_l1, nominal, turbo.


- qcom,cam-cx-ipeak
  Usage: required
  Value type: <u32>
  Definition: Camera Cx Ipeak ID.

- control-camnoc-axi-clk
- control-camnoc-axi-clk
  Usage: optional
  Usage: optional
  Value type: <empty>
  Value type: <empty>
@@ -311,6 +316,7 @@ Example:
		src-clock-name = "slow_ahb_clk_src";
		src-clock-name = "slow_ahb_clk_src";
		clock-rates = <0 0 0 0 80000000 0>;
		clock-rates = <0 0 0 0 80000000 0>;
		clock-cntl-level = "turbo";
		clock-cntl-level = "turbo";
		qcom,cam-cx-ipeak = <&cx_ipeak_lm 8>;
		control-camnoc-axi-clk;
		control-camnoc-axi-clk;
		camnoc-bus-width = <32>;
		camnoc-bus-width = <32>;
		camnoc-axi-clk-bw-margin-perc = <10>;
		camnoc-axi-clk-bw-margin-perc = <10>;
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