Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit e07e83ae authored by Pavel Machek's avatar Pavel Machek Committed by Marc Kleine-Budde
Browse files

can: c_can: make {read,write}_reg functions const 



This patch makes the {read,write}_reg functions const, this is a preparation to
make use of {read,write}_reg in the hwinit callback.

Signed-off-by: default avatarThor Thayer <tthayer@altera.com>
Signed-off-by: default avatarPavel Machek <pavel@denx.de>
Signed-off-by: default avatarMarc Kleine-Budde <mkl@pengutronix.de>
parent fdddfab5

drivers/net/can/c_can/c_can.h

+2 −2
Original line number Original line Diff line number Diff line
@@ -176,8 +176,8 @@ struct c_can_priv { 
	atomic_t tx_active;

	atomic_t tx_active;

	unsigned long tx_dir;

	unsigned long tx_dir;

	int last_status;

	int last_status;

	u16 (*read_reg) (struct c_can_priv *priv, enum reg index);

	u16 (*read_reg) (const struct c_can_priv *priv, enum reg index);

	void (*write_reg) (struct c_can_priv *priv, enum reg index, u16 val);

	void (*write_reg) (const struct c_can_priv *priv, enum reg index, u16 val);

	void __iomem *base;

	void __iomem *base;

	const u16 *regs;

	const u16 *regs;

	void *priv;		/* for board-specific data */

	void *priv;		/* for board-specific data */

drivers/net/can/c_can/c_can_pci.c

+6 −6
Original line number Original line Diff line number Diff line
@@ -47,37 +47,37 @@ struct c_can_pci_data { 
 * registers can be aligned to a 16-bit boundary or 32-bit boundary etc.

 * registers can be aligned to a 16-bit boundary or 32-bit boundary etc.

 * Handle the same by providing a common read/write interface.

 * Handle the same by providing a common read/write interface.

 */

 */

static u16 c_can_pci_read_reg_aligned_to_16bit(struct c_can_priv *priv,

static u16 c_can_pci_read_reg_aligned_to_16bit(const struct c_can_priv *priv,

						enum reg index)

						enum reg index)

{

{

	return readw(priv->base + priv->regs[index]);

	return readw(priv->base + priv->regs[index]);

}

}





static void c_can_pci_write_reg_aligned_to_16bit(struct c_can_priv *priv,

static void c_can_pci_write_reg_aligned_to_16bit(const struct c_can_priv *priv,

						enum reg index, u16 val)

						enum reg index, u16 val)

{

{

	writew(val, priv->base + priv->regs[index]);

	writew(val, priv->base + priv->regs[index]);

}

}





static u16 c_can_pci_read_reg_aligned_to_32bit(struct c_can_priv *priv,

static u16 c_can_pci_read_reg_aligned_to_32bit(const struct c_can_priv *priv,

						enum reg index)

						enum reg index)

{

{

	return readw(priv->base + 2 * priv->regs[index]);

	return readw(priv->base + 2 * priv->regs[index]);

}

}





static void c_can_pci_write_reg_aligned_to_32bit(struct c_can_priv *priv,

static void c_can_pci_write_reg_aligned_to_32bit(const struct c_can_priv *priv,

						enum reg index, u16 val)

						enum reg index, u16 val)

{

{

	writew(val, priv->base + 2 * priv->regs[index]);

	writew(val, priv->base + 2 * priv->regs[index]);

}

}





static u16 c_can_pci_read_reg_32bit(struct c_can_priv *priv,

static u16 c_can_pci_read_reg_32bit(const struct c_can_priv *priv,

				    enum reg index)

				    enum reg index)

{

{

	return (u16)ioread32(priv->base + 2 * priv->regs[index]);

	return (u16)ioread32(priv->base + 2 * priv->regs[index]);

}

}





static void c_can_pci_write_reg_32bit(struct c_can_priv *priv,

static void c_can_pci_write_reg_32bit(const struct c_can_priv *priv,

				      enum reg index, u16 val)

				      enum reg index, u16 val)

{

{

	iowrite32((u32)val, priv->base + 2 * priv->regs[index]);

	iowrite32((u32)val, priv->base + 2 * priv->regs[index]);

drivers/net/can/c_can/c_can_platform.c

+5 −5
Original line number Original line Diff line number Diff line
@@ -47,31 +47,31 @@ static DEFINE_SPINLOCK(raminit_lock); 
 * registers can be aligned to a 16-bit boundary or 32-bit boundary etc.

 * registers can be aligned to a 16-bit boundary or 32-bit boundary etc.

 * Handle the same by providing a common read/write interface.

 * Handle the same by providing a common read/write interface.

 */

 */

static u16 c_can_plat_read_reg_aligned_to_16bit(struct c_can_priv *priv,

static u16 c_can_plat_read_reg_aligned_to_16bit(const struct c_can_priv *priv,

						enum reg index)

						enum reg index)

{

{

	return readw(priv->base + priv->regs[index]);

	return readw(priv->base + priv->regs[index]);

}

}





static void c_can_plat_write_reg_aligned_to_16bit(struct c_can_priv *priv,

static void c_can_plat_write_reg_aligned_to_16bit(const struct c_can_priv *priv,

						enum reg index, u16 val)

						enum reg index, u16 val)

{

{

	writew(val, priv->base + priv->regs[index]);

	writew(val, priv->base + priv->regs[index]);

}

}





static u16 c_can_plat_read_reg_aligned_to_32bit(struct c_can_priv *priv,

static u16 c_can_plat_read_reg_aligned_to_32bit(const struct c_can_priv *priv,

						enum reg index)

						enum reg index)

{

{

	return readw(priv->base + 2 * priv->regs[index]);

	return readw(priv->base + 2 * priv->regs[index]);

}

}





static void c_can_plat_write_reg_aligned_to_32bit(struct c_can_priv *priv,

static void c_can_plat_write_reg_aligned_to_32bit(const struct c_can_priv *priv,

						enum reg index, u16 val)

						enum reg index, u16 val)

{

{

	writew(val, priv->base + 2 * priv->regs[index]);

	writew(val, priv->base + 2 * priv->regs[index]);

}

}





static void c_can_hw_raminit_wait(const struct c_can_priv *priv, u32 mask,

static void c_can_hw_raminit_wait_ti(const struct c_can_priv *priv, u32 mask,

				  u32 val)

				  u32 val)

{

{

	/* We look only at the bits of our instance. */

	/* We look only at the bits of our instance. */