Commit e018deac authored Feb 26, 2021 by Wenjun Zhang

ARM: dts: msm: set qupv3 se15 i2c rate to 100khz

Since it was used only for dsi-hdmi bridge chipset,
the chipset could not support higher rate, so set
it to 100khz.

Change-Id: Ieeede3aabb0698270bf0d9eec920c787c11ecf83

parent a5509335

qcom/lahaina-hdk.dtsi

+3 −1

Original line number	Diff line number	Diff line
		@@ -85,7 +85,9 @@

		&qupv3_se15_i2c {
		status = "ok";

		qcom,clk-freq-out = <100000>;
		#address-cells = <1>;
		#size-cells = <0>;
		lt9611: lt,lt9611@2b {
		compatible = "lt,lt9611uxc";
		reg = <0x2b>;