Loading arch/mips/kernel/head.S +0 −1 Original line number Diff line number Diff line Loading @@ -138,7 +138,6 @@ .fill 0x400 #endif EXPORT(stext) # used for profiling EXPORT(_stext) #ifndef CONFIG_BOOT_RAW Loading arch/mips/mm/c-r4k.c +2 −2 Original line number Diff line number Diff line Loading @@ -23,6 +23,7 @@ #include <asm/page.h> #include <asm/pgtable.h> #include <asm/r4kcache.h> #include <asm/sections.h> #include <asm/system.h> #include <asm/mmu_context.h> #include <asm/war.h> Loading Loading @@ -1010,7 +1011,6 @@ static void __init probe_pcache(void) */ static int __init probe_scache(void) { extern unsigned long stext; unsigned long flags, addr, begin, end, pow2; unsigned int config = read_c0_config(); struct cpuinfo_mips *c = ¤t_cpu_data; Loading @@ -1019,7 +1019,7 @@ static int __init probe_scache(void) if (config & CONF_SC) return 0; begin = (unsigned long) &stext; begin = (unsigned long) &_stext; begin &= ~((4 * 1024 * 1024) - 1); end = begin + (4 * 1024 * 1024); Loading Loading
arch/mips/kernel/head.S +0 −1 Original line number Diff line number Diff line Loading @@ -138,7 +138,6 @@ .fill 0x400 #endif EXPORT(stext) # used for profiling EXPORT(_stext) #ifndef CONFIG_BOOT_RAW Loading
arch/mips/mm/c-r4k.c +2 −2 Original line number Diff line number Diff line Loading @@ -23,6 +23,7 @@ #include <asm/page.h> #include <asm/pgtable.h> #include <asm/r4kcache.h> #include <asm/sections.h> #include <asm/system.h> #include <asm/mmu_context.h> #include <asm/war.h> Loading Loading @@ -1010,7 +1011,6 @@ static void __init probe_pcache(void) */ static int __init probe_scache(void) { extern unsigned long stext; unsigned long flags, addr, begin, end, pow2; unsigned int config = read_c0_config(); struct cpuinfo_mips *c = ¤t_cpu_data; Loading @@ -1019,7 +1019,7 @@ static int __init probe_scache(void) if (config & CONF_SC) return 0; begin = (unsigned long) &stext; begin = (unsigned long) &_stext; begin &= ~((4 * 1024 * 1024) - 1); end = begin + (4 * 1024 * 1024); Loading