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Commit e0018afe authored by Luwei Kang's avatar Luwei Kang Committed by Paolo Bonzini
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perf/x86/intel/pt: add new capability for Intel PT 



This adds support for "output to Trace Transport subsystem"
capability of Intel PT. It means that PT can output its
trace to an MMIO address range rather than system memory buffer.

Acked-by: default avatarSong Liu <songliubraving@fb.com>
Signed-off-by: default avatarLuwei Kang <luwei.kang@intel.com>
Reviewed-by: default avatarThomas Gleixner <tglx@linutronix.de>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent 69843a91

arch/x86/events/intel/pt.c

+1 −0
Original line number Diff line number Diff line
@@ -68,6 +68,7 @@ static struct pt_cap_desc { 
	PT_CAP(topa_output,		0, CPUID_ECX, BIT(0)),

	PT_CAP(topa_multiple_entries,	0, CPUID_ECX, BIT(1)),

	PT_CAP(single_range_output,	0, CPUID_ECX, BIT(2)),

	PT_CAP(output_subsys,		0, CPUID_ECX, BIT(3)),

	PT_CAP(payloads_lip,		0, CPUID_ECX, BIT(31)),

	PT_CAP(num_address_ranges,	1, CPUID_EAX, 0x3),

	PT_CAP(mtc_periods,		1, CPUID_EAX, 0xffff0000),

arch/x86/include/asm/intel_pt.h

+1 −0
Original line number Diff line number Diff line
@@ -16,6 +16,7 @@ enum pt_capabilities { 
	PT_CAP_topa_output,

	PT_CAP_topa_multiple_entries,

	PT_CAP_single_range_output,

	PT_CAP_output_subsys,

	PT_CAP_payloads_lip,

	PT_CAP_num_address_ranges,

	PT_CAP_mtc_periods,