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Unverified Commit dfc8d8de authored by Peter Zijlstra's avatar Peter Zijlstra Committed by Paul Burton
Browse files

mips/atomic: Fix cmpxchg64 barriers 



There were no memory barriers on the 32bit implementation of
cmpxchg64(). Fix this.

Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: default avatarPaul Burton <paul.burton@mips.com>
parent 00f3e689

arch/mips/include/asm/cmpxchg.h

+5 −2
Original line number Diff line number Diff line
@@ -290,10 +290,13 @@ static inline unsigned long __cmpxchg64(volatile void *ptr, 
	 * will cause a build error unless cpu_has_64bits is a		\

	 * compile-time constant 1.					\

	 */								\

	if (cpu_has_64bits && kernel_uses_llsc)				\

	if (cpu_has_64bits && kernel_uses_llsc) {			\

		smp_mb__before_llsc();					\

		__res = __cmpxchg64((ptr), __old, __new);		\

	else								\

		smp_llsc_mb();						\

	} else {							\

		__res = __cmpxchg64_unsupported();			\

	}								\

									\

	__res;								\

})