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Commit dea86a80 authored by Marc Zyngier's avatar Marc Zyngier Committed by Will Deacon
Browse files

arm64: Use arch_timer_read_counter instead of arch_counter_get_cntvct 



Only arch_timer_read_counter will guarantee that workarounds are
applied. So let's use this one instead of arch_counter_get_cntvct.

Acked-by: default avatarMark Rutland <mark.rutland@arm.com>
Signed-off-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
parent eae1ddc6

arch/arm64/kernel/traps.c

+2 −2
Original line number Diff line number Diff line
@@ -493,7 +493,7 @@ static void cntvct_read_handler(unsigned int esr, struct pt_regs *regs) 
{

	int rt = ESR_ELx_SYS64_ISS_RT(esr);



	pt_regs_write_reg(regs, rt, arch_counter_get_cntvct());

	pt_regs_write_reg(regs, rt, arch_timer_read_counter());

	arm64_skip_faulting_instruction(regs, AARCH64_INSN_SIZE);

}
@@ -665,7 +665,7 @@ static void compat_cntvct_read_handler(unsigned int esr, struct pt_regs *regs) 
{

	int rt = (esr & ESR_ELx_CP15_64_ISS_RT_MASK) >> ESR_ELx_CP15_64_ISS_RT_SHIFT;

	int rt2 = (esr & ESR_ELx_CP15_64_ISS_RT2_MASK) >> ESR_ELx_CP15_64_ISS_RT2_SHIFT;

	u64 val = arch_counter_get_cntvct();

	u64 val = arch_timer_read_counter();



	pt_regs_write_reg(regs, rt, lower_32_bits(val));

	pt_regs_write_reg(regs, rt2, upper_32_bits(val));