Commit de925d9d authored Apr 26, 2010 by Michal Simek

microblaze: Fix kmalloc alignment on non-coherent DMA platforms



Based on PowerPC patche 52142e75

PowerPC description:
On platforms doing non-coherent DMA (4xx, 8xx, ...), it's important
that the kmalloc minimum alignment is set to the cache line size, to
avoid sharing cache lines between different objects, so that DMA to
one of the objects doesn't corrupt the other.

Signed-off-by: Michal Simek <monstr@monstr.eu>

parent c17e1a1c

arch/microblaze/include/asm/page.h

+3 −0

Original line number	Diff line number	Diff line
		@@ -31,6 +31,9 @@

		#ifndef __ASSEMBLY__

		/* MS be sure that SLAB allocates aligned objects */
		#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES

		#define PAGE_UP(addr) (((addr)+((PAGE_SIZE)-1))&(~((PAGE_SIZE)-1)))
		#define PAGE_DOWN(addr) ((addr)&(~((PAGE_SIZE)-1)))