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Commit de90573e authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'net-stmmac-Some-improvements-and-a-fix'



Jose Abreu says:

====================
net: stmmac: Some improvements and a fix

Some performace improvements (01/03 and 03/03) and a fix (02/03), all for -next.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 12479f62 2af6106a
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+1 −0
Original line number Diff line number Diff line
@@ -3,6 +3,7 @@ config STMMAC_ETH
	tristate "STMicroelectronics Multi-Gigabit Ethernet driver"
	depends on HAS_IOMEM && HAS_DMA
	select MII
	select PAGE_POOL
	select PHYLINK
	select CRC32
	imply PTP_1588_CLOCK
+1 −0
Original line number Diff line number Diff line
@@ -252,6 +252,7 @@ struct stmmac_safety_stats {
#define STMMAC_MAX_COAL_TX_TICK	100000
#define STMMAC_TX_MAX_FRAMES	256
#define STMMAC_TX_FRAMES	1
#define STMMAC_RX_FRAMES	25

/* Packets types */
enum packets_types {
+4 −4
Original line number Diff line number Diff line
@@ -289,18 +289,18 @@ static void sun8i_dwmac_dma_init(void __iomem *ioaddr,

static void sun8i_dwmac_dma_init_rx(void __iomem *ioaddr,
				    struct stmmac_dma_cfg *dma_cfg,
				    u32 dma_rx_phy, u32 chan)
				    dma_addr_t dma_rx_phy, u32 chan)
{
	/* Write RX descriptors address */
	writel(dma_rx_phy, ioaddr + EMAC_RX_DESC_LIST);
	writel(lower_32_bits(dma_rx_phy), ioaddr + EMAC_RX_DESC_LIST);
}

static void sun8i_dwmac_dma_init_tx(void __iomem *ioaddr,
				    struct stmmac_dma_cfg *dma_cfg,
				    u32 dma_tx_phy, u32 chan)
				    dma_addr_t dma_tx_phy, u32 chan)
{
	/* Write TX descriptors address */
	writel(dma_tx_phy, ioaddr + EMAC_TX_DESC_LIST);
	writel(lower_32_bits(dma_tx_phy), ioaddr + EMAC_TX_DESC_LIST);
}

/* sun8i_dwmac_dump_regs() - Dump EMAC address space
+4 −4
Original line number Diff line number Diff line
@@ -112,18 +112,18 @@ static void dwmac1000_dma_init(void __iomem *ioaddr,

static void dwmac1000_dma_init_rx(void __iomem *ioaddr,
				  struct stmmac_dma_cfg *dma_cfg,
				  u32 dma_rx_phy, u32 chan)
				  dma_addr_t dma_rx_phy, u32 chan)
{
	/* RX descriptor base address list must be written into DMA CSR3 */
	writel(dma_rx_phy, ioaddr + DMA_RCV_BASE_ADDR);
	writel(lower_32_bits(dma_rx_phy), ioaddr + DMA_RCV_BASE_ADDR);
}

static void dwmac1000_dma_init_tx(void __iomem *ioaddr,
				  struct stmmac_dma_cfg *dma_cfg,
				  u32 dma_tx_phy, u32 chan)
				  dma_addr_t dma_tx_phy, u32 chan)
{
	/* TX descriptor base address list must be written into DMA CSR4 */
	writel(dma_tx_phy, ioaddr + DMA_TX_BASE_ADDR);
	writel(lower_32_bits(dma_tx_phy), ioaddr + DMA_TX_BASE_ADDR);
}

static u32 dwmac1000_configure_fc(u32 csr6, int rxfifosz)
+4 −4
Original line number Diff line number Diff line
@@ -31,18 +31,18 @@ static void dwmac100_dma_init(void __iomem *ioaddr,

static void dwmac100_dma_init_rx(void __iomem *ioaddr,
				 struct stmmac_dma_cfg *dma_cfg,
				 u32 dma_rx_phy, u32 chan)
				 dma_addr_t dma_rx_phy, u32 chan)
{
	/* RX descriptor base addr lists must be written into DMA CSR3 */
	writel(dma_rx_phy, ioaddr + DMA_RCV_BASE_ADDR);
	writel(lower_32_bits(dma_rx_phy), ioaddr + DMA_RCV_BASE_ADDR);
}

static void dwmac100_dma_init_tx(void __iomem *ioaddr,
				 struct stmmac_dma_cfg *dma_cfg,
				 u32 dma_tx_phy, u32 chan)
				 dma_addr_t dma_tx_phy, u32 chan)
{
	/* TX descriptor base addr lists must be written into DMA CSR4 */
	writel(dma_tx_phy, ioaddr + DMA_TX_BASE_ADDR);
	writel(lower_32_bits(dma_tx_phy), ioaddr + DMA_TX_BASE_ADDR);
}

/* Store and Forward capability is not used at all.
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