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Commit dd572f23 authored by Gauri Joshi's avatar Gauri Joshi
Browse files

msm: ep_pcie: Add IPA MSI ATU config 



All transactions originating from IPA have the Relaxed Ordering
bit set by default. Setup an ATU region to clear the bit for
MSIs triggered via IPA DMA as MSI writes shouldn't have it set.

Change-Id: Ib092834ca2d1a3e01aa3e63e1b35f7ab6766d9a0
Signed-off-by: default avatarSiva Kumar Akkireddi <sivaa@codeaurora.org>
Signed-off-by: default avatarGauri Joshi <gaurjosh@codeaurora.org>
parent 9186f102

drivers/platform/msm/ep_pcie/ep_pcie_com.h

+2 −0
Original line number Diff line number Diff line
@@ -187,6 +187,7 @@ 
#define EP_PCIE_OATU_INDEX_MSI 1

#define EP_PCIE_OATU_INDEX_CTRL 2

#define EP_PCIE_OATU_INDEX_DATA 3

#define EP_PCIE_OATU_INDEX_IPA_MSI 4



#define EP_PCIE_OATU_UPPER 0x100
@@ -402,6 +403,7 @@ struct ep_pcie_dev_t { 
	atomic_t		     ep_pcie_dev_wake;

	atomic_t                     perst_deast;

	atomic_t                     host_wake_pending;

	bool			     conf_ipa_msi_iatu;



	struct ep_pcie_register_event *event_reg;

	struct work_struct	     handle_perst_work;

drivers/platform/msm/ep_pcie/ep_pcie_core.c

+19 −0
Original line number Diff line number Diff line
@@ -2015,6 +2015,7 @@ int ep_pcie_core_disable_endpoint(void) 
		EP_PCIE_DBG(dev, "PCIe V%d: shut down the link\n",

			dev->rev);

	}

	dev->conf_ipa_msi_iatu = false;



	val =  readl_relaxed(dev->elbi + PCIE20_ELBI_SYS_STTS);

	EP_PCIE_DBG(dev, "PCIe V%d: LTSSM_STATE during disable:0x%x\n",
@@ -2947,6 +2948,24 @@ int ep_pcie_core_get_msi_config(struct ep_pcie_msi_config *cfg) 
			ep_pcie_dev.msi_cfg.upper = upper;

			ep_pcie_dev.msi_cfg.data = data;

			ep_pcie_dev.msi_cfg.msg_num = cfg->msg_num;

			ep_pcie_dev.conf_ipa_msi_iatu = false;

		}

		/*

		 * All transactions originating from IPA have the RO

		 * bit set by default. Setup another ATU region to clear

		 * the RO bit for MSIs triggered via IPA DMA.

		 */

		if (ep_pcie_dev.active_config &&

				!ep_pcie_dev.conf_ipa_msi_iatu) {

			ep_pcie_config_outbound_iatu_entry(&ep_pcie_dev,

				EP_PCIE_OATU_INDEX_IPA_MSI,

				lower, 0,

				(lower + resource_size(msi) - 1),

				lower, upper);

			ep_pcie_dev.conf_ipa_msi_iatu = true;

			EP_PCIE_DBG(&ep_pcie_dev,

				"PCIe V%d: Conf iATU for IPA MSI info: lower:0x%x; upper:0x%x\n",

				ep_pcie_dev.rev, lower, upper);

		}

		return 0;

	}