Loading drivers/gpu/drm/nouveau/Kconfig +3 −2 Original line number Diff line number Diff line Loading @@ -30,11 +30,12 @@ config DRM_NOUVEAU_DEBUG via debugfs. menu "I2C encoder or helper chips" depends on DRM depends on DRM && I2C config DRM_I2C_CH7006 tristate "Chrontel ch7006 TV encoder" default m if DRM_NOUVEAU depends on DRM_NOUVEAU default m help Support for Chrontel ch7006 and similar TV encoders, found on some nVidia video cards. Loading drivers/gpu/drm/nouveau/nouveau_bo.c +2 −0 Original line number Diff line number Diff line Loading @@ -311,8 +311,10 @@ nouveau_bo_create_ttm_backend_entry(struct ttm_bo_device *bdev) struct drm_device *dev = dev_priv->dev; switch (dev_priv->gart_info.type) { #if __OS_HAS_AGP case NOUVEAU_GART_AGP: return ttm_agp_backend_init(bdev, dev->agp->bridge); #endif case NOUVEAU_GART_SGDMA: return nouveau_sgdma_init_ttm(dev); default: Loading drivers/gpu/drm/nouveau/nouveau_fence.c +1 −1 Original line number Diff line number Diff line Loading @@ -205,7 +205,7 @@ nouveau_fence_wait(void *sync_obj, void *sync_arg, bool lazy, bool intr) schedule_timeout(1); if (intr && signal_pending(current)) { ret = -ERESTART; ret = -ERESTARTSYS; break; } } Loading drivers/gpu/drm/nouveau/nouveau_gem.c +0 −7 Original line number Diff line number Diff line Loading @@ -342,8 +342,6 @@ validate_init(struct nouveau_channel *chan, struct drm_file *file_priv, } ret = ttm_bo_wait_cpu(&nvbo->bo, false); if (ret == -ERESTART) ret = -EAGAIN; if (ret) return ret; goto retry; Loading Loading @@ -915,8 +913,6 @@ nouveau_gem_ioctl_cpu_prep(struct drm_device *dev, void *data, goto out; ret = ttm_bo_wait_cpu(&nvbo->bo, no_wait); if (ret == -ERESTART) ret = -EAGAIN; if (ret) goto out; } Loading @@ -925,9 +921,6 @@ nouveau_gem_ioctl_cpu_prep(struct drm_device *dev, void *data, ret = ttm_bo_wait(&nvbo->bo, false, false, no_wait); } else { ret = ttm_bo_synccpu_write_grab(&nvbo->bo, no_wait); if (ret == -ERESTART) ret = -EAGAIN; else if (ret == 0) nvbo->cpu_filp = file_priv; } Loading drivers/gpu/drm/nouveau/nouveau_mem.c +4 −0 Original line number Diff line number Diff line Loading @@ -407,6 +407,7 @@ uint64_t nouveau_mem_fb_amount(struct drm_device *dev) return 0; } #if __OS_HAS_AGP static void nouveau_mem_reset_agp(struct drm_device *dev) { uint32_t saved_pci_nv_1, saved_pci_nv_19, pmc_enable; Loading @@ -432,10 +433,12 @@ static void nouveau_mem_reset_agp(struct drm_device *dev) nv_wr32(dev, NV04_PBUS_PCI_NV_19, saved_pci_nv_19); nv_wr32(dev, NV04_PBUS_PCI_NV_1, saved_pci_nv_1); } #endif int nouveau_mem_init_agp(struct drm_device *dev) { #if __OS_HAS_AGP struct drm_nouveau_private *dev_priv = dev->dev_private; struct drm_agp_info info; struct drm_agp_mode mode; Loading Loading @@ -471,6 +474,7 @@ nouveau_mem_init_agp(struct drm_device *dev) dev_priv->gart_info.type = NOUVEAU_GART_AGP; dev_priv->gart_info.aper_base = info.aperture_base; dev_priv->gart_info.aper_size = info.aperture_size; #endif return 0; } Loading Loading
drivers/gpu/drm/nouveau/Kconfig +3 −2 Original line number Diff line number Diff line Loading @@ -30,11 +30,12 @@ config DRM_NOUVEAU_DEBUG via debugfs. menu "I2C encoder or helper chips" depends on DRM depends on DRM && I2C config DRM_I2C_CH7006 tristate "Chrontel ch7006 TV encoder" default m if DRM_NOUVEAU depends on DRM_NOUVEAU default m help Support for Chrontel ch7006 and similar TV encoders, found on some nVidia video cards. Loading
drivers/gpu/drm/nouveau/nouveau_bo.c +2 −0 Original line number Diff line number Diff line Loading @@ -311,8 +311,10 @@ nouveau_bo_create_ttm_backend_entry(struct ttm_bo_device *bdev) struct drm_device *dev = dev_priv->dev; switch (dev_priv->gart_info.type) { #if __OS_HAS_AGP case NOUVEAU_GART_AGP: return ttm_agp_backend_init(bdev, dev->agp->bridge); #endif case NOUVEAU_GART_SGDMA: return nouveau_sgdma_init_ttm(dev); default: Loading
drivers/gpu/drm/nouveau/nouveau_fence.c +1 −1 Original line number Diff line number Diff line Loading @@ -205,7 +205,7 @@ nouveau_fence_wait(void *sync_obj, void *sync_arg, bool lazy, bool intr) schedule_timeout(1); if (intr && signal_pending(current)) { ret = -ERESTART; ret = -ERESTARTSYS; break; } } Loading
drivers/gpu/drm/nouveau/nouveau_gem.c +0 −7 Original line number Diff line number Diff line Loading @@ -342,8 +342,6 @@ validate_init(struct nouveau_channel *chan, struct drm_file *file_priv, } ret = ttm_bo_wait_cpu(&nvbo->bo, false); if (ret == -ERESTART) ret = -EAGAIN; if (ret) return ret; goto retry; Loading Loading @@ -915,8 +913,6 @@ nouveau_gem_ioctl_cpu_prep(struct drm_device *dev, void *data, goto out; ret = ttm_bo_wait_cpu(&nvbo->bo, no_wait); if (ret == -ERESTART) ret = -EAGAIN; if (ret) goto out; } Loading @@ -925,9 +921,6 @@ nouveau_gem_ioctl_cpu_prep(struct drm_device *dev, void *data, ret = ttm_bo_wait(&nvbo->bo, false, false, no_wait); } else { ret = ttm_bo_synccpu_write_grab(&nvbo->bo, no_wait); if (ret == -ERESTART) ret = -EAGAIN; else if (ret == 0) nvbo->cpu_filp = file_priv; } Loading
drivers/gpu/drm/nouveau/nouveau_mem.c +4 −0 Original line number Diff line number Diff line Loading @@ -407,6 +407,7 @@ uint64_t nouveau_mem_fb_amount(struct drm_device *dev) return 0; } #if __OS_HAS_AGP static void nouveau_mem_reset_agp(struct drm_device *dev) { uint32_t saved_pci_nv_1, saved_pci_nv_19, pmc_enable; Loading @@ -432,10 +433,12 @@ static void nouveau_mem_reset_agp(struct drm_device *dev) nv_wr32(dev, NV04_PBUS_PCI_NV_19, saved_pci_nv_19); nv_wr32(dev, NV04_PBUS_PCI_NV_1, saved_pci_nv_1); } #endif int nouveau_mem_init_agp(struct drm_device *dev) { #if __OS_HAS_AGP struct drm_nouveau_private *dev_priv = dev->dev_private; struct drm_agp_info info; struct drm_agp_mode mode; Loading Loading @@ -471,6 +474,7 @@ nouveau_mem_init_agp(struct drm_device *dev) dev_priv->gart_info.type = NOUVEAU_GART_AGP; dev_priv->gart_info.aper_base = info.aperture_base; dev_priv->gart_info.aper_size = info.aperture_size; #endif return 0; } Loading