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Commit dbd3ab67 authored by Jack Pham's avatar Jack Pham
Browse files

usb: dwc3-msm: Allow xo_clk to be optional 



Some instances of USB controller get XO directly from the
pad and hence don't need a GCC clock to enable it. Allow
xo_clk to be optional if not specified in DT.

Speaking of optional clocks, remove the NULL checks and allow
clk_* APIs to get called unconditionally, since they already
handle NULL pointers. Finally remove the clk_put() call for
xo_clk since it is already devm managed.

Change-Id: I1864219b89c7a636989f44fa7d6640bf5f156453
Signed-off-by: default avatarJack Pham <jackp@codeaurora.org>
parent af346132

drivers/usb/dwc3/dwc3-msm.c

+8 −19
Original line number Original line Diff line number Diff line
@@ -2869,13 +2869,11 @@ static int dwc3_msm_suspend(struct dwc3_msm *mdwc, bool force_power_collapse) 
	wmb();

	wmb();





	/* Disable clocks */

	/* Disable clocks */

	if (mdwc->bus_aggr_clk)

	clk_disable_unprepare(mdwc->bus_aggr_clk);

	clk_disable_unprepare(mdwc->bus_aggr_clk);

	clk_disable_unprepare(mdwc->utmi_clk);

	clk_disable_unprepare(mdwc->utmi_clk);





	clk_set_rate(mdwc->core_clk, 19200000);

	clk_set_rate(mdwc->core_clk, 19200000);

	clk_disable_unprepare(mdwc->core_clk);

	clk_disable_unprepare(mdwc->core_clk);

	if (mdwc->noc_aggr_clk)

	clk_disable_unprepare(mdwc->noc_aggr_clk);

	clk_disable_unprepare(mdwc->noc_aggr_clk);

	/*

	/*

	 * Disable iface_clk only after core_clk as core_clk has FSM

	 * Disable iface_clk only after core_clk as core_clk has FSM
@@ -2999,7 +2997,6 @@ static int dwc3_msm_resume(struct dwc3_msm *mdwc) 
	 * Turned ON iface_clk before core_clk due to FSM depedency.

	 * Turned ON iface_clk before core_clk due to FSM depedency.

	 */

	 */

	clk_prepare_enable(mdwc->iface_clk);

	clk_prepare_enable(mdwc->iface_clk);

	if (mdwc->noc_aggr_clk)

	clk_prepare_enable(mdwc->noc_aggr_clk);

	clk_prepare_enable(mdwc->noc_aggr_clk);





	core_clk_rate = mdwc->core_clk_rate;

	core_clk_rate = mdwc->core_clk_rate;
@@ -3013,7 +3010,6 @@ static int dwc3_msm_resume(struct dwc3_msm *mdwc) 
	clk_prepare_enable(mdwc->core_clk);

	clk_prepare_enable(mdwc->core_clk);





	clk_prepare_enable(mdwc->utmi_clk);

	clk_prepare_enable(mdwc->utmi_clk);

	if (mdwc->bus_aggr_clk)

	clk_prepare_enable(mdwc->bus_aggr_clk);

	clk_prepare_enable(mdwc->bus_aggr_clk);





	/*

	/*
@@ -3335,12 +3331,8 @@ static int dwc3_msm_get_clk_gdsc(struct dwc3_msm *mdwc) 
	}

	}





	mdwc->xo_clk = devm_clk_get(mdwc->dev, "xo");

	mdwc->xo_clk = devm_clk_get(mdwc->dev, "xo");

	if (IS_ERR(mdwc->xo_clk)) {

	if (IS_ERR(mdwc->xo_clk))

		dev_err(mdwc->dev, "%s unable to get TCXO buffer handle\n",

		mdwc->xo_clk = NULL;

								__func__);

		ret = PTR_ERR(mdwc->xo_clk);

		return ret;

	}

	clk_set_rate(mdwc->xo_clk, 19200000);

	clk_set_rate(mdwc->xo_clk, 19200000);





	mdwc->iface_clk = devm_clk_get(mdwc->dev, "iface_clk");

	mdwc->iface_clk = devm_clk_get(mdwc->dev, "iface_clk");
@@ -4134,13 +4126,11 @@ static int dwc3_msm_remove(struct platform_device *pdev) 
	if (ret_pm < 0) {

	if (ret_pm < 0) {

		dev_err(mdwc->dev,

		dev_err(mdwc->dev,

			"pm_runtime_get_sync failed with %d\n", ret_pm);

			"pm_runtime_get_sync failed with %d\n", ret_pm);

		if (mdwc->noc_aggr_clk)

		clk_prepare_enable(mdwc->noc_aggr_clk);

		clk_prepare_enable(mdwc->noc_aggr_clk);

		clk_prepare_enable(mdwc->utmi_clk);

		clk_prepare_enable(mdwc->utmi_clk);

		clk_prepare_enable(mdwc->core_clk);

		clk_prepare_enable(mdwc->core_clk);

		clk_prepare_enable(mdwc->iface_clk);

		clk_prepare_enable(mdwc->iface_clk);

		clk_prepare_enable(mdwc->sleep_clk);

		clk_prepare_enable(mdwc->sleep_clk);

		if (mdwc->bus_aggr_clk)

		clk_prepare_enable(mdwc->bus_aggr_clk);

		clk_prepare_enable(mdwc->bus_aggr_clk);

		clk_prepare_enable(mdwc->xo_clk);

		clk_prepare_enable(mdwc->xo_clk);

	}

	}
@@ -4182,7 +4172,6 @@ static int dwc3_msm_remove(struct platform_device *pdev) 
	clk_disable_unprepare(mdwc->iface_clk);

	clk_disable_unprepare(mdwc->iface_clk);

	clk_disable_unprepare(mdwc->sleep_clk);

	clk_disable_unprepare(mdwc->sleep_clk);

	clk_disable_unprepare(mdwc->xo_clk);

	clk_disable_unprepare(mdwc->xo_clk);

	clk_put(mdwc->xo_clk);





	dwc3_msm_config_gdsc(mdwc, 0);

	dwc3_msm_config_gdsc(mdwc, 0);