drivers: soc: Add support for SDMSHRIKE llcc driver (dbcc71dc) · Commits · e / devices / android_kernel_fairphone_FP5

drivers/soc/qcom/Kconfig

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		@@ -212,6 +212,15 @@ config QCOM_SM8150_LLCC
		can start using the LLCC slices.
		If unsure, say n.

		config QCOM_SDMSHRIKE_LLCC
		tristate "Qualcomm Technologies, Inc. SDMSHRIKE LLCC driver"
		depends on QCOM_LLCC
		help
		Say y or m here to enable the LLCC driver for SDMSHRIKE platform.
		This provides data required to configure LLCC so that clients
		can start using the LLCC slices.
		If unsure, say n.

		config QCOM_SDM845_LLCC
		tristate "Qualcomm Technologies, Inc. SDM845 LLCC driver"
		depends on QCOM_LLCC

drivers/soc/qcom/Makefile

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		@@ -45,6 +45,7 @@ obj-$(CONFIG_QCOM_SDXLEMUR_LLCC) += llcc-sdxlemur.o
		obj-$(CONFIG_QCOM_SHIMA_LLCC) += llcc-shima.o
		obj-$(CONFIG_QCOM_YUPIK_LLCC) += llcc-yupik.o
		obj-$(CONFIG_QCOM_SM8150_LLCC) += llcc-sm8150.o
		obj-$(CONFIG_QCOM_SDMSHRIKE_LLCC) += llcc-sdmshrike.o
		obj-$(CONFIG_QCOM_MINIDUMP) += msm_minidump.o minidump_log.o
		obj-$(CONFIG_QCOM_MEM_OFFLINE) += mem-offline.o
		obj-$(CONFIG_QCOM_MEM_BUF) += mem-buf.o mem_buf_dma_buf.o

drivers/soc/qcom/llcc-sdmshrike.c

0 → 100644

+109 −0

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		// SPDX-License-Identifier: GPL-2.0-only
		/*
		* Copyright (c) 2017-2018,2020 The Linux Foundation. All rights reserved.
		*
		*/

		#include <linux/kernel.h>
		#include <linux/module.h>
		#include <linux/of.h>
		#include <linux/platform_device.h>
		#include <linux/soc/qcom/llcc-qcom.h>

		/*
		* SCT entry contains of the following parameters
		* uid: Unique id for the client's use case
		* slice_id: llcc slice id for each client
		* max_cap: The maximum capacity of the cache slice provided in KB
		* priority: Priority of the client used to select victim line for replacement
		* fixed_size: Determine of the slice has a fixed capacity
		* bonus_ways: Bonus ways to be used by any slice, bonus way is used only if
		* it't not a reserved way.
		* res_ways: Reserved ways for the cache slice, the reserved ways cannot be used
		* by any other client than the one its assigned to.
		* cache_mode: Each slice operates as a cache, this controls the mode of the
		* slice normal or TCM
		* probe_target_ways: Determines what ways to probe for access hit. When
		* configured to 1 only bonus and reserved ways are probed.
		* when configured to 0 all ways in llcc are probed.
		* write_scid_en: Bit enables write cache support for a given scid.
		* dis_cap_alloc: Disable capacity based allocation for a client
		* retain_on_pc: If this bit is set and client has maitained active vote
		* then the ways assigned to this client are not flushed on power
		* collapse.
		* activate_on_init: Activate the slice immidiately after the SCT is programmed
		*/
		#define SCT_ENTRY(uid, sid, mc, p, fs, bway, rway, cmod, ptw, dca, wse, rp, a) \
		{ .usecase_id = uid, \
		.slice_id = sid, \
		.max_cap = mc, \
		.priority = p, \
		.fixed_size = fs, \
		.bonus_ways = bway, \
		.res_ways = rway, \
		.cache_mode = cmod, \
		.probe_target_ways = ptw, \
		.dis_cap_alloc = dca, \
		.write_scid_en = wse, \
		.retain_on_pc = rp, \
		.activate_on_init = a, \
		}

		static struct llcc_slice_config sdmshrike_data[] = {
		SCT_ENTRY(LLCC_CPUSS, 1, 6144, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 1),
		SCT_ENTRY(LLCC_VIDSC0, 2, 512, 2, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),
		SCT_ENTRY(LLCC_VIDSC1, 3, 512, 2, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),
		SCT_ENTRY(LLCC_ROTATOR, 4, 1024, 2, 1, 0xFFF, 0x0, 2, 0, 0, 0, 1, 0),
		SCT_ENTRY(LLCC_VOICE, 5, 6144, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),
		SCT_ENTRY(LLCC_AUDIO, 6, 6144, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),
		SCT_ENTRY(LLCC_MDMHPGRW, 7, 1024, 2, 0, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),
		SCT_ENTRY(LLCC_MDM, 8, 6144, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),
		SCT_ENTRY(LLCC_CMPT, 10, 6144, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),
		SCT_ENTRY(LLCC_GPUHTW, 11, 1024, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),
		SCT_ENTRY(LLCC_GPU, 12, 5120, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),
		SCT_ENTRY(LLCC_MMUHWT, 13, 6144, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 0, 1),
		SCT_ENTRY(LLCC_CMPTDMA, 15, 6144, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),
		SCT_ENTRY(LLCC_DISP, 16, 6144, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),
		SCT_ENTRY(LLCC_VIDFW, 17, 6144, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),
		SCT_ENTRY(LLCC_MDMHPFX, 20, 1024, 2, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),
		SCT_ENTRY(LLCC_MDMPNG, 21, 1024, 0, 1, 0xF, 0x0, 0, 0, 0, 0, 1, 0),
		SCT_ENTRY(LLCC_AUDHW, 22, 1024, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),
		SCT_ENTRY(LLCC_NPU, 23, 6144, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),
		SCT_ENTRY(LLCC_WLNHW, 24, 6144, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),
		SCT_ENTRY(LLCC_PIMEM, 25, 1024, 1, 1, 0xFFF, 0x0, 0, 0, 0, 0, 1, 0),
		};

		static int sdmshrike_qcom_llcc_probe(struct platform_device *pdev)
		{
		return qcom_llcc_probe(pdev, sdmshrike_data,
		ARRAY_SIZE(sdmshrike_data));
		}

		static const struct of_device_id sdmshrike_qcom_llcc_of_match[] = {
		{ .compatible = "qcom,sdmshrike-llcc", },
		{ },
		};

		static struct platform_driver sdmshrike_qcom_llcc_driver = {
		.driver = {
		.name = "sdmshrike-llcc",
		.of_match_table = sdmshrike_qcom_llcc_of_match,
		},
		.probe = sdmshrike_qcom_llcc_probe,
		.remove = qcom_llcc_remove,
		};

		static int __init sdmshrike_init_qcom_llcc_init(void)
		{
		return platform_driver_register(&sdmshrike_qcom_llcc_driver);
		}
		module_init(sdmshrike_init_qcom_llcc_init);

		static void __exit sdmshrike_exit_qcom_llcc_exit(void)
		{
		platform_driver_unregister(&sdmshrike_qcom_llcc_driver);
		}
		module_exit(sdmshrike_exit_qcom_llcc_exit);

		MODULE_DESCRIPTION("Qualcomm Technologies Inc SA8195 LLCC driver");
		MODULE_LICENSE("GPL v2");

include/linux/soc/qcom/llcc-qcom.h

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		@@ -29,6 +29,7 @@
		#define LLCC_AUDHW 22
		#define LLCC_NPU 23
		#define LLCC_WLNHW 24
		#define LLCC_PIMEM 25
		#define LLCC_CVP 28
		#define LLCC_MDMVPE 29
		#define LLCC_APTCM 30