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Commit db4d6d9d authored by Joel Stanley's avatar Joel Stanley
Browse files

ARM: dts: aspeed: Correctly order UART nodes 



Order them all by address.

Reviewed-by: default avatarAndrew Jeffery <andrew@aj.id.au>
Signed-off-by: default avatarJoel Stanley <joel@jms.id.au>
parent 0bae3904

arch/arm/boot/dts/aspeed-g4.dtsi

+24 −24
Original line number Diff line number Diff line
@@ -183,6 +183,27 @@ 
				clock-names = "PCLK";

			};



			uart1: serial@1e783000 {

				compatible = "ns16550a";

				reg = <0x1e783000 0x1000>;

				reg-shift = <2>;

				interrupts = <9>;

				clocks = <&clk_uart>;

				no-loopback-test;

				status = "disabled";

			};



			uart5: serial@1e784000 {

				compatible = "ns16550a";

				reg = <0x1e784000 0x1000>;

				reg-shift = <2>;

				interrupts = <10>;

				clocks = <&clk_uart>;

				current-speed = <38400>;

				no-loopback-test;

				status = "disabled";

			};



			wdt1: wdt@1e785000 {

				compatible = "aspeed,ast2400-wdt";

				reg = <0x1e785000 0x1c>;
@@ -197,11 +218,11 @@ 
				status = "disabled";

			};



			uart1: serial@1e783000 {

			uart6: serial@1e787000 {

				compatible = "ns16550a";

				reg = <0x1e783000 0x1000>;

				reg = <0x1e787000 0x1000>;

				reg-shift = <2>;

				interrupts = <9>;

				interrupts = <10>;

				clocks = <&clk_uart>;

				no-loopback-test;

				status = "disabled";
@@ -237,27 +258,6 @@ 
				status = "disabled";

			};



			uart5: serial@1e784000 {

				compatible = "ns16550a";

				reg = <0x1e784000 0x1000>;

				reg-shift = <2>;

				interrupts = <10>;

				clocks = <&clk_uart>;

				current-speed = <38400>;

				no-loopback-test;

				status = "disabled";

			};



			uart6: serial@1e787000 {

				compatible = "ns16550a";

				reg = <0x1e787000 0x1000>;

				reg-shift = <2>;

				interrupts = <10>;

				clocks = <&clk_uart>;

				no-loopback-test;

				status = "disabled";

			};



			i2c: i2c@1e78a000 {

				compatible = "simple-bus";

				#address-cells = <1>;

arch/arm/boot/dts/aspeed-g5.dtsi

+30 −31
Original line number Diff line number Diff line
@@ -227,6 +227,26 @@ 
				clock-names = "PCLK";

			};



			uart1: serial@1e783000 {

				compatible = "ns16550a";

				reg = <0x1e783000 0x1000>;

				reg-shift = <2>;

				interrupts = <9>;

				clocks = <&clk_uart>;

				no-loopback-test;

				status = "disabled";

			};



			uart5: serial@1e784000 {

				compatible = "ns16550a";

				reg = <0x1e784000 0x1000>;

				reg-shift = <2>;

				interrupts = <10>;

				clocks = <&clk_uart>;

				current-speed = <38400>;

				no-loopback-test;

				status = "disabled";

			};



			wdt1: wdt@1e785000 {

				compatible = "aspeed,ast2500-wdt";
@@ -247,16 +267,6 @@ 
				status = "disabled";

			};



			uart1: serial@1e783000 {

				compatible = "ns16550a";

				reg = <0x1e783000 0x1000>;

				reg-shift = <2>;

				interrupts = <9>;

				clocks = <&clk_uart>;

				no-loopback-test;

				status = "disabled";

			};



			lpc: lpc@1e789000 {

				compatible = "aspeed,ast2500-lpc", "simple-mfd";

				reg = <0x1e789000 0x1000>;
@@ -287,6 +297,16 @@ 
				};

			};



			uart6: serial@1e787000 {

				compatible = "ns16550a";

				reg = <0x1e787000 0x1000>;

				reg-shift = <2>;

				interrupts = <10>;

				clocks = <&clk_uart>;

				no-loopback-test;

				status = "disabled";

			};



			uart2: serial@1e78d000 {

				compatible = "ns16550a";

				reg = <0x1e78d000 0x1000>;
@@ -317,27 +337,6 @@ 
				status = "disabled";

			};



			uart5: serial@1e784000 {

				compatible = "ns16550a";

				reg = <0x1e784000 0x1000>;

				reg-shift = <2>;

				interrupts = <10>;

				clocks = <&clk_uart>;

				current-speed = <38400>;

				no-loopback-test;

				status = "disabled";

			};



			uart6: serial@1e787000 {

				compatible = "ns16550a";

				reg = <0x1e787000 0x1000>;

				reg-shift = <2>;

				interrupts = <10>;

				clocks = <&clk_uart>;

				no-loopback-test;

				status = "disabled";

			};



			i2c: i2c@1e78a000 {

				compatible = "simple-bus";

				#address-cells = <1>;